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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id n15-20020a170902d2cf00b001dcfaab3457sm1811758plc.104.2024.03.23.10.30.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Mar 2024 10:30:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: svens@stackframe.org, deller@gmx.de Subject: [PATCH v2 7/7] target/hppa: Fix EIRR, EIEM versus icount Date: Sat, 23 Mar 2024 07:29:54 -1000 Message-Id: <20240323172954.1041480-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240323172954.1041480-1-richard.henderson@linaro.org> References: <20240323172954.1041480-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Call translator_io_start before write to EIRR. Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt. Exit TB after write to EIEM, but otherwise use a straight store. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/helper.h | 1 - target/hppa/int_helper.c | 14 ++++---------- target/hppa/translate.c | 10 +++++++--- 3 files changed, 11 insertions(+), 14 deletions(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 1bdbcd8f98..8fd7ba65d8 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -91,7 +91,6 @@ DEF_HELPER_1(rfi, void, env) DEF_HELPER_1(rfi_r, void, env) DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl) -DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl) DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index efe638b36e..90437a92cd 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -28,7 +28,7 @@ static void eval_interrupt(HPPACPU *cpu) { CPUState *cs = CPU(cpu); - if (cpu->env.cr[CR_EIRR] & cpu->env.cr[CR_EIEM]) { + if (cpu->env.cr[CR_EIRR]) { cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -89,14 +89,6 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val) bql_unlock(); } -void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val) -{ - env->cr[CR_EIEM] = val; - bql_lock(); - eval_interrupt(env_archcpu(env)); - bql_unlock(); -} - void hppa_cpu_do_interrupt(CPUState *cs) { HPPACPU *cpu = HPPA_CPU(cs); @@ -280,7 +272,9 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request) } /* If interrupts are requested and enabled, raise them. */ - if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) { + if ((interrupt_request & CPU_INTERRUPT_HARD) + && (env->psw & PSW_I) + && (env->cr[CR_EIRR] & env->cr[CR_EIEM])) { cs->exception_index = EXCP_EXT_INTERRUPT; hppa_cpu_do_interrupt(cs); return true; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 5b8c1b06c3..46b2d6508d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2166,10 +2166,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a) gen_helper_write_interval_timer(tcg_env, reg); break; case CR_EIRR: + /* Helper modifies interrupt lines and is therefore IO. */ + translator_io_start(&ctx->base); gen_helper_write_eirr(tcg_env, reg); - break; - case CR_EIEM: - gen_helper_write_eiem(tcg_env, reg); + /* Exit to re-evaluate interrupts in the main loop. */ ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT; break; @@ -2195,6 +2195,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a) #endif break; + case CR_EIEM: + /* Exit to re-evaluate interrupts in the main loop. */ + ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT; + /* FALLTHRU */ default: tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl])); break;