diff mbox series

[v2,3/3] target/hppa: Fix diag instructions to set/restore shadow registers

Message ID 20240326181028.332867-4-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/hppa: Tidy and extend diag instructions | expand

Commit Message

Richard Henderson March 26, 2024, 6:10 p.m. UTC
The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different
diag instructions to save or restore the CPU registers to/from
the shadow registers.

Implement those per-CPU architecture diag instructions to fix those
parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test
the shadow registers.

Signed-off-by: Helge Deller <deller@gmx.de>
[rth: Use decodetree to distinguish cases]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/insns.decode | 10 ++++++++++
 target/hppa/translate.c  | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

Comments

Helge Deller March 26, 2024, 8:35 p.m. UTC | #1
On 3/26/24 19:10, Richard Henderson wrote:
> The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different

I initially should have used the correct naming in my patch.
So this sentence above should read:
The 32-bit PA-7300LC (PCX-L2) CPU and the 64-bit PA8700 (PCX-W2) CPU use different....


> diag instructions to save or restore the CPU registers to/from
> the shadow registers.
>
> Implement those per-CPU architecture diag instructions to fix those
> parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test
> the shadow registers.
>
> Signed-off-by: Helge Deller <deller@gmx.de>
> [rth: Use decodetree to distinguish cases]
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/hppa/insns.decode | 10 ++++++++++
>   target/hppa/translate.c  | 34 ++++++++++++++++++++++++++++++++++
>   2 files changed, 44 insertions(+)
>
> diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
> index 9f6ffd8e2c..c2acb3796c 100644
> --- a/target/hppa/insns.decode
> +++ b/target/hppa/insns.decode
> @@ -65,6 +65,8 @@
>   # Argument set definitions
>   ####
>
> +&empty
> +
>   # All insns that need to form a virtual address should use this set.
>   &ldst           t b x disp sp m scale size
>
> @@ -638,6 +640,14 @@ xmpyu           001110 ..... ..... 010 .0111 .00 t:5    r1=%ra64 r2=%rb64
>     [
>       diag_btlb               000101 00 0000 0000 0000 0001 0000 0000
>       diag_cout               000101 00 0000 0000 0000 0001 0000 0001
> +
> +    # For 32-bit 7300C

For 32-bit PA-7300LC (PCX-L2) CPU:


> +    diag_getshadowregs_pa1  000101 00 0000 0000 0001 1010 0000 0000
> +    diag_putshadowregs_pa1  000101 00 0000 0000 0001 1010 0100 0000
> +
> +    # For 64-bit PCX-W 8500

For 64-bit PA8700 (PCX-W2) CPU:


other than that:
Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>

Thanks a lot for the nice rewrite & cleanup!!
Helge


> +    diag_getshadowregs_pa2  000101 00 0111 1000 0001 1000 0100 0000
> +    diag_putshadowregs_pa2  000101 00 0111 0000 0001 1000 0100 0000
>     ]
>     diag_unimp                000101 i:26
>   }
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 42dd3f2c8d..143818c2d9 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -2399,6 +2399,20 @@ static bool do_getshadowregs(DisasContext *ctx)
>       return nullify_end(ctx);
>   }
>
> +static bool do_putshadowregs(DisasContext *ctx)
> +{
> +    CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);
> +    nullify_over(ctx);
> +    tcg_gen_st_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0]));
> +    tcg_gen_st_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1]));
> +    tcg_gen_st_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2]));
> +    tcg_gen_st_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3]));
> +    tcg_gen_st_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4]));
> +    tcg_gen_st_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5]));
> +    tcg_gen_st_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6]));
> +    return nullify_end(ctx);
> +}
> +
>   static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a)
>   {
>       return do_getshadowregs(ctx);
> @@ -4594,6 +4608,26 @@ static bool trans_diag_cout(DisasContext *ctx, arg_diag_cout *a)
>   #endif
>   }
>
> +static bool trans_diag_getshadowregs_pa1(DisasContext *ctx, arg_empty *a)
> +{
> +    return !ctx->is_pa20 && do_getshadowregs(ctx);
> +}
> +
> +static bool trans_diag_getshadowregs_pa2(DisasContext *ctx, arg_empty *a)
> +{
> +    return ctx->is_pa20 && do_getshadowregs(ctx);
> +}
> +
> +static bool trans_diag_putshadowregs_pa1(DisasContext *ctx, arg_empty *a)
> +{
> +    return !ctx->is_pa20 && do_putshadowregs(ctx);
> +}
> +
> +static bool trans_diag_putshadowregs_pa2(DisasContext *ctx, arg_empty *a)
> +{
> +    return ctx->is_pa20 && do_putshadowregs(ctx);
> +}
> +
>   static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a)
>   {
>       CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);
diff mbox series

Patch

diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index 9f6ffd8e2c..c2acb3796c 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -65,6 +65,8 @@ 
 # Argument set definitions
 ####
 
+&empty
+
 # All insns that need to form a virtual address should use this set.
 &ldst           t b x disp sp m scale size
 
@@ -638,6 +640,14 @@  xmpyu           001110 ..... ..... 010 .0111 .00 t:5    r1=%ra64 r2=%rb64
   [
     diag_btlb               000101 00 0000 0000 0000 0001 0000 0000
     diag_cout               000101 00 0000 0000 0000 0001 0000 0001
+
+    # For 32-bit 7300C
+    diag_getshadowregs_pa1  000101 00 0000 0000 0001 1010 0000 0000
+    diag_putshadowregs_pa1  000101 00 0000 0000 0001 1010 0100 0000
+
+    # For 64-bit PCX-W 8500
+    diag_getshadowregs_pa2  000101 00 0111 1000 0001 1000 0100 0000
+    diag_putshadowregs_pa2  000101 00 0111 0000 0001 1000 0100 0000
   ]
   diag_unimp                000101 i:26
 }
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 42dd3f2c8d..143818c2d9 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2399,6 +2399,20 @@  static bool do_getshadowregs(DisasContext *ctx)
     return nullify_end(ctx);
 }
 
+static bool do_putshadowregs(DisasContext *ctx)
+{
+    CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);
+    nullify_over(ctx);
+    tcg_gen_st_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0]));
+    tcg_gen_st_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1]));
+    tcg_gen_st_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2]));
+    tcg_gen_st_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3]));
+    tcg_gen_st_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4]));
+    tcg_gen_st_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5]));
+    tcg_gen_st_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6]));
+    return nullify_end(ctx);
+}
+
 static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a)
 {
     return do_getshadowregs(ctx);
@@ -4594,6 +4608,26 @@  static bool trans_diag_cout(DisasContext *ctx, arg_diag_cout *a)
 #endif
 }
 
+static bool trans_diag_getshadowregs_pa1(DisasContext *ctx, arg_empty *a)
+{
+    return !ctx->is_pa20 && do_getshadowregs(ctx);
+}
+
+static bool trans_diag_getshadowregs_pa2(DisasContext *ctx, arg_empty *a)
+{
+    return ctx->is_pa20 && do_getshadowregs(ctx);
+}
+
+static bool trans_diag_putshadowregs_pa1(DisasContext *ctx, arg_empty *a)
+{
+    return !ctx->is_pa20 && do_putshadowregs(ctx);
+}
+
+static bool trans_diag_putshadowregs_pa2(DisasContext *ctx, arg_empty *a)
+{
+    return ctx->is_pa20 && do_putshadowregs(ctx);
+}
+
 static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a)
 {
     CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);