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[176.184.5.52]) by smtp.gmail.com with ESMTPSA id l13-20020a056402028d00b0056bfa6ad5eesm959518edv.91.2024.03.28.08.56.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 28 Mar 2024 08:56:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Eduardo Habkost , Stefano Stabellini , xen-devel@lists.xenproject.org, Bernhard Beschow , Thomas Huth , Marcel Apfelbaum , "Michael S. Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 18/29] hw/i386/pc: Inline has_reserved_memory() Date: Thu, 28 Mar 2024 16:54:26 +0100 Message-ID: <20240328155439.58719-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=philmd@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org All PCI-based machines have the has_reserved_memory field set to %true. Simplify by using an inlined helper checking whether the machine is PCI-based or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 1 - hw/i386/pc.c | 17 ++++++++++------- hw/i386/pc_piix.c | 1 - 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 758dd5f29b..df4c813854 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -91,7 +91,6 @@ typedef struct PCMachineClass { SmbiosEntryPointType default_smbios_ep_type; /* RAM / address space compat: */ - bool has_reserved_memory; bool broken_reserved_end; bool enforce_amd_1tb_hole; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 093a7c35f7..e36d76656b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -671,6 +671,11 @@ void xen_load_linux(PCMachineState *pcms) #define PC_ROM_ALIGN 0x800 #define PC_ROM_SIZE (PC_ROM_MAX - PC_ROM_MIN_VGA) +static bool has_reserved_memory(PCMachineState *pcms) +{ + return pc_machine_is_pci_enabled(pcms); +} + static hwaddr pc_above_4g_end(PCMachineState *pcms) { X86MachineState *x86ms = X86_MACHINE(pcms); @@ -702,12 +707,11 @@ static void pc_get_device_memory_range(PCMachineState *pcms, static uint64_t pc_get_cxl_range_start(PCMachineState *pcms) { - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); MachineState *ms = MACHINE(pcms); hwaddr cxl_base; ram_addr_t size; - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &cxl_base, &size); cxl_base += size; @@ -760,7 +764,7 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, uint64_t pci_hole64_size) * calculating the highest possible GPA so that we can properly report * if someone configures them on a CPU that cannot possibly address them. */ - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { hwaddr devmem_start; ram_addr_t devmem_size; @@ -891,7 +895,7 @@ void pc_memory_init(PCMachineState *pcms, e820_add_entry(pcms->sgx_epc.base, pcms->sgx_epc.size, E820_RESERVED); } - if (!pcmc->has_reserved_memory && + if (!has_reserved_memory(pcms) && (machine->ram_slots || (machine->maxram_size > machine->ram_size))) { @@ -901,7 +905,7 @@ void pc_memory_init(PCMachineState *pcms, } /* initialize device memory address space */ - if (pcmc->has_reserved_memory && + if (has_reserved_memory(pcms) && (machine->ram_size < machine->maxram_size)) { ram_addr_t device_mem_size; hwaddr device_mem_base; @@ -1024,7 +1028,7 @@ uint64_t pc_pci_hole64_start(void) if (ppms->cxl_devices_state.is_enabled) { hole64_start = pc_get_cxl_range_end(pcms); - } else if (pcmc->has_reserved_memory && (ms->ram_size < ms->maxram_size)) { + } else if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) { pc_get_device_memory_range(pcms, &hole64_start, &size); if (!pcmc->broken_reserved_end) { hole64_start += size; @@ -1752,7 +1756,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); pcmc->smbios_defaults = true; - pcmc->has_reserved_memory = true; pcmc->enforce_amd_1tb_hole = true; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0bc14da768..e6178f8653 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -830,7 +830,6 @@ static void isapc_machine_options(MachineClass *m) m->rom_file_has_mr = false; pcmc->smbios_defaults = false; pcmc->smbios_legacy_mode = true; - pcmc->has_reserved_memory = false; m->default_nic = "ne2k_isa"; m->default_cpu_type = X86_CPU_TYPE_NAME("486"); m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);