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[176.184.44.142]) by smtp.gmail.com with ESMTPSA id o14-20020a05600c510e00b00419f572671dsm34316236wms.20.2024.04.29.14.31.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 29 Apr 2024 14:31:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 11/13] accel/tcg: Move @tcg_cflags from CPUState to TCG AccelCPUState Date: Mon, 29 Apr 2024 23:30:48 +0200 Message-ID: <20240429213050.55177-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240429213050.55177-1-philmd@linaro.org> References: <20240429213050.55177-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org @tcg_cflags is specific to TCG accelerator, move it to its AccelCPUState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240428221450.26460-23-philmd@linaro.org> --- accel/tcg/vcpu-state.h | 2 ++ include/hw/core/cpu.h | 4 +--- accel/tcg/cpu-exec.c | 6 +++--- linux-user/main.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/accel/tcg/vcpu-state.h b/accel/tcg/vcpu-state.h index 0cb58ba734..6c12bd17df 100644 --- a/accel/tcg/vcpu-state.h +++ b/accel/tcg/vcpu-state.h @@ -11,9 +11,11 @@ /** * AccelCPUState: vCPU fields specific to TCG accelerator + * @cflags: Pre-computed cflags for this cpu. * @plugin_state: per-CPU plugin state */ struct AccelCPUState { + uint32_t cflags; uint32_t cflags_next_tb; sigjmp_buf jmp_env; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 6e6e946b66..14e96aae85 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -394,9 +394,8 @@ struct qemu_work_item; * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER * QOM parent. - * Under TCG this value is propagated to @tcg_cflags. + * Under TCG this value is propagated to @accel->cflags. * See TranslationBlock::TCG CF_CLUSTER_MASK. - * @tcg_cflags: Pre-computed cflags for this cpu. * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU core. * @running: #true if CPU is currently running (lockless). @@ -515,7 +514,6 @@ struct CPUState { /* TODO Move common fields from CPUArchState here. */ int cpu_index; int cluster_index; - uint32_t tcg_cflags; uint32_t halted; int32_t exception_index; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 8f8e1fa948..84fd041aec 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -149,17 +149,17 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu) bool tcg_cflags_has(CPUState *cpu, uint32_t flags) { - return cpu->tcg_cflags & flags; + return cpu->accel->cflags & flags; } void tcg_cflags_set(CPUState *cpu, uint32_t flags) { - cpu->tcg_cflags |= flags; + cpu->accel->cflags |= flags; } uint32_t curr_cflags(CPUState *cpu) { - uint32_t cflags = cpu->tcg_cflags; + uint32_t cflags = cpu->accel->cflags; /* * Record gdb single-step. We should be exiting the TB by raising diff --git a/linux-user/main.c b/linux-user/main.c index 5f7f03f4b0..8be06627da 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -241,7 +241,7 @@ CPUArchState *cpu_copy(CPUArchState *env) /* Reset non arch specific state */ cpu_reset(new_cpu); - new_cpu->tcg_cflags = cpu->tcg_cflags; + new_cpu->accel->cflags = cpu->accel->cflags; memcpy(new_env, env, sizeof(CPUArchState)); #if defined(TARGET_I386) || defined(TARGET_X86_64) new_env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,