From patchwork Thu May 2 21:15:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 13652118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3879C4345F for ; Thu, 2 May 2024 21:17:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s2dmS-0008Qx-9h; Thu, 02 May 2024 17:15:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s2dmP-0008PR-Vt for qemu-devel@nongnu.org; Thu, 02 May 2024 17:15:50 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s2dmO-0002xP-8u for qemu-devel@nongnu.org; Thu, 02 May 2024 17:15:49 -0400 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-6ee12766586so1918010b3a.0 for ; Thu, 02 May 2024 14:15:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714684546; x=1715289346; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g4g45BkGS8w3EbMobr6UW9PhzYenQ+7TK1b6L3tKNCw=; b=mTXz/qcdMLP5Uv5cehB8jrGIzw7X4q2rlFP2a9kf7KDZWmMamE597MzNCSHRhrMc7q x/JXxbXAonBn2iAWkDZO/c844qTkHaIh/ORrbWeSE7Em/51Frpn2U38xOayHCf5w+yus Nd8ucoG2g0ACKSb0Qng0NmJZs0WbX+BepKi/yxCyiv1Uk1Yzq+tacwI96YYTt4A56GCF S5Dji3gEdhNPhwV7kxIajNlTWEqQDR62LfRb++BXE5Z7TKmr2VpAXN8QxxzaAY3K6pr1 PnoWcCQ9C0QqcD+NXcmX1q9pF/fFGhpuMJXU3h/y+3Whf40MJhLqRO8F23JkBgJguw+N UBFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714684546; x=1715289346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g4g45BkGS8w3EbMobr6UW9PhzYenQ+7TK1b6L3tKNCw=; b=UKosv8+YUcGbHyJq5Nqx3ikdLuCvLEbcpjv4in6iyMEi41ZXrE1WDnuYR+iG0KlQ+Z /wnG4RsHtokKB5EnRzEqCm/eefMJw+KA/URpRNB7BwGIS64m2QjKGmPWmIiFAfwKT6Aj 01oGs08rKF12YtXIE5Kkw1B+1m75Sb7IDs12saa3PW988mAZw1mEGX3QGvf9jDog0WPN 1EnTTwcbxmiLYylTC6pnS5kAX0XHuDbT0HsduaBtTw/mzc9tVLDLDHJrLdTfXda2Avam 3qLkhafZzwfVIcHnvCd/KE9SUcfGq8Xsv8y9VSorjM5kSESQnVAq0BymE59leZTRi1QF WayA== X-Gm-Message-State: AOJu0YzHCKp/2VeyMOc94Tu+1faE/sToIeEW4nQHsbDLKQ2f4s4sFq/2 9nzNQ8mP0kjJQDHzoTpVM7JEiUJN3EMgMSY+MCf1ZS8rW5VcSRkUtWb+qLkLSKgge5CQqo0JPIi 4jjI= X-Google-Smtp-Source: AGHT+IHxCWaVnc/+KxYFuonWcJw8FtBRTxqnIU6pNmK5ggVztT/m3yGLHSDJj1QB45zmjhIpYM4iOQ== X-Received: by 2002:a05:6a21:594:b0:1a3:a821:f297 with SMTP id lw20-20020a056a21059400b001a3a821f297mr1178953pzb.2.1714684546077; Thu, 02 May 2024 14:15:46 -0700 (PDT) Received: from linaro.vn.shawcable.net ([2604:3d08:9384:1d00::ecd0]) by smtp.gmail.com with ESMTPSA id d14-20020a63f24e000000b0060063c4be3bsm1700915pgk.14.2024.05.02.14.15.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 May 2024 14:15:45 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Mahmoud Mandour , Alexandre Iooss , Richard Henderson , Paolo Bonzini , Pierrick Bouvier , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH v6 8/9] plugins: extract cpu_index generate Date: Thu, 2 May 2024 14:15:21 -0700 Message-Id: <20240502211522.346467-9-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240502211522.346467-1-pierrick.bouvier@linaro.org> References: <20240502211522.346467-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Factorizes function to access current cpu index for a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- accel/tcg/plugin-gen.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index b829a959398..7b73520e788 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,12 +101,17 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } +static TCGv_i32 gen_cpu_index(void) +{ + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + return cpu_index; +} + static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); @@ -121,9 +126,7 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) char *base_ptr = arr->data + entry.offset; size_t entry_size = g_array_get_element_size(arr); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); @@ -156,7 +159,6 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGLabel *after_cb = gen_new_label(); @@ -165,15 +167,14 @@ static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) tcg_gen_ld_i64(val, ptr, 0); tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_temp_free_i32(cpu_index); gen_set_label(after_cb); tcg_temp_free_i64(val); - tcg_temp_free_i32(cpu_index); tcg_temp_free_ptr(ptr); } @@ -203,10 +204,7 @@ static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)),