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Fri, 31 May 2024 02:15:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEX43JL8KA55J2SbY7pzO+Tbo00RiKv/sIy6o64qXi0u/JC7e3+p3KGhybDaeT6/Poj61pWBQ== X-Received: by 2002:a50:d69b:0:b0:57a:1fef:619e with SMTP id 4fb4d7f45d1cf-57a363fcc53mr831524a12.18.1717146909857; Fri, 31 May 2024 02:15:09 -0700 (PDT) Received: from avogadro.local ([151.81.115.112]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57a31bb8282sm763545a12.25.2024.05.31.02.15.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 02:15:09 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 4/6] host/i386: assume presence of SSE2 Date: Fri, 31 May 2024 11:14:55 +0200 Message-ID: <20240531091457.42200-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240531091457.42200-1-pbonzini@redhat.com> References: <20240531091457.42200-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.085, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org QEMU now requires an x86-64-v2 host, which has SSE2. Use it freely in buffer_is_zero. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- host/include/i386/host/cpuinfo.h | 1 - util/bufferiszero.c | 2 +- util/cpuinfo-i386.c | 1 - 3 files changed, 1 insertion(+), 3 deletions(-) diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpuinfo.h index 81771733eaa..72f6fad61e5 100644 --- a/host/include/i386/host/cpuinfo.h +++ b/host/include/i386/host/cpuinfo.h @@ -14,7 +14,6 @@ #define CPUINFO_POPCNT (1u << 4) #define CPUINFO_BMI1 (1u << 5) #define CPUINFO_BMI2 (1u << 6) -#define CPUINFO_SSE2 (1u << 7) #define CPUINFO_AVX1 (1u << 9) #define CPUINFO_AVX2 (1u << 10) #define CPUINFO_AVX512F (1u << 11) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 74864f7b782..6245976eca1 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -195,7 +195,7 @@ static unsigned best_accel(void) return 2; } #endif - return info & CPUINFO_SSE2 ? 1 : 0; + return 1; } #elif defined(__aarch64__) && defined(__ARM_NEON) diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c index 90f92a42dc8..ca74ef04f54 100644 --- a/util/cpuinfo-i386.c +++ b/util/cpuinfo-i386.c @@ -34,7 +34,6 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) if (max >= 1) { __cpuid(1, a, b, c, d); - info |= (d & bit_SSE2 ? CPUINFO_SSE2 : 0); info |= (c & bit_MOVBE ? CPUINFO_MOVBE : 0); info |= (c & bit_POPCNT ? CPUINFO_POPCNT : 0); info |= (c & bit_PCLMUL ? CPUINFO_PCLMUL : 0);