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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c1a775d68dsm9237943a91.6.2024.06.04.00.10.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jun 2024 00:10:29 -0700 (PDT) From: "Fea.Wang" To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Alistair Francis , Peter Maydell , Jason Wang , qemu-arm@nongnu.org (open list:Xilinx Zynq), "Fea.Wang" , "Edgar E . Iglesias" , Frank Chang Subject: [PATCH v2 2/3] hw/dma: Add a trace log for a description loading failure Date: Tue, 4 Jun 2024 15:15:39 +0800 Message-Id: <20240604071540.18138-3-fea.wang@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240604071540.18138-1-fea.wang@sifive.com> References: <20240604071540.18138-1-fea.wang@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=fea.wang@sifive.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Due to a description loading failure, adding a trace log makes observing the DMA behavior easy. Signed-off-by: Fea.Wang Reviewed-by: Edgar E. Iglesias Reviewed-by: Frank Chang --- hw/dma/trace-events | 3 +++ hw/dma/xilinx_axidma.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/hw/dma/trace-events b/hw/dma/trace-events index 3c47df54e4..95db083be4 100644 --- a/hw/dma/trace-events +++ b/hw/dma/trace-events @@ -44,3 +44,6 @@ pl330_debug_exec_stall(void) "stall of debug instruction not implemented" pl330_iomem_write(uint32_t offset, uint32_t value) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 pl330_iomem_write_clr(int i) "event interrupt lowered %d" pl330_iomem_read(uint32_t addr, uint32_t data) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 + +# xilinx_axidma.c +xilinx_axidma_loading_desc_fail(uint32_t res) "error:%d" diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index ad307994c2..c9cfc3169b 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -36,6 +36,7 @@ #include "sysemu/dma.h" #include "hw/stream.h" #include "qom/object.h" +#include "trace.h" #define D(x) @@ -201,6 +202,8 @@ static MemTxResult stream_desc_load(struct Stream *s, hwaddr addr) addr, MEMTXATTRS_UNSPECIFIED, d, sizeof *d); if (result != MEMTX_OK) { + trace_xilinx_axidma_loading_desc_fail(result); + if (result == MEMTX_DECODE_ERROR) { s->regs[R_DMASR] |= DMASR_DECERR; } else {