| Message ID | 20240604071833.962574-6-pbonzini@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/i386: fixes for INHIBIT_IRQ, TF and RF | expand |
On 6/4/24 02:18, Paolo Bonzini wrote: > DR7.GD triggers a #DB exception on any access to debug registers. > The GD bit is cleared so that the #DB handler itself can access > the debug registers. > > Signed-off-by: Paolo Bonzini<pbonzini@redhat.com> > --- > target/i386/tcg/sysemu/bpt_helper.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c index 4d96a48a3ca..c1d5fce250c 100644 --- a/target/i386/tcg/sysemu/bpt_helper.c +++ b/target/i386/tcg/sysemu/bpt_helper.c @@ -238,6 +238,12 @@ target_ulong helper_get_dr(CPUX86State *env, int reg) } } + if (env->dr[7] & DR7_GD) { + env->dr[7] &= ~DR7_GD; + env->dr[6] |= DR6_BD; + raise_exception_ra(env, EXCP01_DB, GETPC()); + } + return env->dr[reg]; } @@ -251,6 +257,12 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0) } } + if (env->dr[7] & DR7_GD) { + env->dr[7] &= ~DR7_GD; + env->dr[6] |= DR6_BD; + raise_exception_ra(env, EXCP01_DB, GETPC()); + } + if (reg < 4) { if (hw_breakpoint_enabled(env->dr[7], reg) && hw_breakpoint_type(env->dr[7], reg) != DR7_TYPE_IO_RW) {
DR7.GD triggers a #DB exception on any access to debug registers. The GD bit is cleared so that the #DB handler itself can access the debug registers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target/i386/tcg/sysemu/bpt_helper.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)