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Sat, 08 Jun 2024 01:41:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHtvJth3KNOtWifwme71r7PA2RpVzYxTh/153YSn2uMDXEiPCPVuhW3IOCJU8HT//zFiFce2Q== X-Received: by 2002:a50:cc9a:0:b0:578:5851:b0da with SMTP id 4fb4d7f45d1cf-57c5099a2famr2796329a12.36.1717836118734; Sat, 08 Jun 2024 01:41:58 -0700 (PDT) Received: from avogadro.local ([151.81.115.112]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57aae13faccsm3971676a12.54.2024.06.08.01.41.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jun 2024 01:41:56 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 12/25] target/i386: split X86_CHECK_prot into PE and VM86 checks Date: Sat, 8 Jun 2024 10:41:00 +0200 Message-ID: <20240608084113.2770363-13-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240608084113.2770363-1-pbonzini@redhat.com> References: <20240608084113.2770363-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org SYSENTER is allowed in VM86 mode, but not in real mode. Split the check so that PE and !VM86 are covered by separate bits. Signed-off-by: Paolo Bonzini Acked-by: Richard Henderson --- target/i386/tcg/decode-new.h | 8 ++++++-- target/i386/tcg/decode-new.c.inc | 9 +++++++-- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/decode-new.h b/target/i386/tcg/decode-new.h index 5577f7509aa..b46a9a0ccb3 100644 --- a/target/i386/tcg/decode-new.h +++ b/target/i386/tcg/decode-new.h @@ -149,8 +149,8 @@ typedef enum X86InsnCheck { X86_CHECK_i64 = 1, X86_CHECK_o64 = 2, - /* Fault outside protected mode */ - X86_CHECK_prot = 4, + /* Fault in vm86 mode */ + X86_CHECK_no_vm86 = 4, /* Privileged instruction checks */ X86_CHECK_cpl0 = 8, @@ -166,6 +166,10 @@ typedef enum X86InsnCheck { /* Fault if VEX.W=0 */ X86_CHECK_W1 = 256, + + /* Fault outside protected mode, possibly including vm86 mode */ + X86_CHECK_prot_or_vm86 = 512, + X86_CHECK_prot = X86_CHECK_prot_or_vm86 | X86_CHECK_no_vm86, } X86InsnCheck; typedef enum X86InsnSpecial { diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 1c6fa39c3eb..f02f7c62647 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -2558,8 +2558,13 @@ static void disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } } - if (decode.e.check & X86_CHECK_prot) { - if (!PE(s) || VM86(s)) { + if (decode.e.check & X86_CHECK_prot_or_vm86) { + if (!PE(s)) { + goto illegal_op; + } + } + if (decode.e.check & X86_CHECK_no_vm86) { + if (VM86(s)) { goto illegal_op; } }