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Sat, 08 Jun 2024 01:42:43 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGKHrz81WP2xiFpiVddh0eh54+736GE4evfMlYCqo2TTlegcY2tLEND4G4PFazZ2nfu0BgaAA== X-Received: by 2002:a05:6512:3d29:b0:52b:959c:1dc7 with SMTP id 2adb3069b0e04-52bb9fc5eadmr4604705e87.42.1717836162695; Sat, 08 Jun 2024 01:42:42 -0700 (PDT) Received: from avogadro.local ([151.81.115.112]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6c805cccfesm356672866b.86.2024.06.08.01.42.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jun 2024 01:42:40 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 25/25] target/i386: remove gen_ext_tl Date: Sat, 8 Jun 2024 10:41:13 +0200 Message-ID: <20240608084113.2770363-26-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240608084113.2770363-1-pbonzini@redhat.com> References: <20240608084113.2770363-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org With the introduction of tcg_gen_ext_tl, most uses can be converted directly because they do not have a NULL destination. tcg_gen_ext_tl is able to drop no-ops like "tcg_gen_ext_tl(tcgv, tcgv, MO_TL)" just fine, and the only thing that gen_ext_tl was adding on top was avoiding the creation of a useless temporary. This can be done in the only place where it matters, which is gen_op_j_ecx. Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- target/i386/tcg/translate.c | 41 +++++++++++++++---------------------- 1 file changed, 17 insertions(+), 24 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index ee5ef3ccbc6..8089b502628 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -697,23 +697,16 @@ static inline TCGv gen_compute_Dshift(DisasContext *s, MemOp ot) return dshift; }; -static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign) -{ - if (size == MO_TL) { - return src; - } - if (!dst) { - dst = tcg_temp_new(); - } - tcg_gen_ext_tl(dst, src, size | (sign ? MO_SIGN : 0)); - return dst; -} - static void gen_op_j_ecx(DisasContext *s, TCGCond cond, TCGLabel *label1) { - TCGv tmp = gen_ext_tl(NULL, cpu_regs[R_ECX], s->aflag, false); - - tcg_gen_brcondi_tl(cond, tmp, 0, label1); + TCGv lhs; + if (s->aflag == MO_TL) { + lhs = cpu_regs[R_ECX]; + } else { + lhs = tcg_temp_new(); + tcg_gen_ext_tl(lhs, cpu_regs[R_ECX], s->aflag); + } + tcg_gen_brcondi_tl(cond, lhs, 0, label1); } static inline void gen_op_jz_ecx(DisasContext *s, TCGLabel *label1) @@ -886,16 +879,16 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) case CC_OP_SUBB ... CC_OP_SUBQ: /* (DATA_TYPE)CC_SRCT < (DATA_TYPE)CC_SRC */ size = s->cc_op - CC_OP_SUBB; - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond = TCG_COND_LTU, .reg = s->cc_srcT, .reg2 = cpu_cc_src, .use_reg2 = true }; case CC_OP_ADDB ... CC_OP_ADDQ: /* (DATA_TYPE)CC_DST < (DATA_TYPE)CC_SRC */ size = s->cc_op - CC_OP_ADDB; - gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond = TCG_COND_LTU, .reg = cpu_cc_dst, .reg2 = cpu_cc_src, .use_reg2 = true }; @@ -920,7 +913,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) case CC_OP_BMILGB ... CC_OP_BMILGQ: size = s->cc_op - CC_OP_BMILGB; - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond = TCG_COND_EQ, .reg = cpu_cc_src }; case CC_OP_ADCX: @@ -1048,8 +1041,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) size = s->cc_op - CC_OP_SUBB; switch (jcc_op) { case JCC_BE: - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); cc = (CCPrepare) { .cond = TCG_COND_LEU, .reg = s->cc_srcT, .reg2 = cpu_cc_src, .use_reg2 = true }; break; @@ -1059,8 +1052,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) case JCC_LE: cond = TCG_COND_LE; fast_jcc_l: - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, true); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, true); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size | MO_SIGN); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size | MO_SIGN); cc = (CCPrepare) { .cond = cond, .reg = s->cc_srcT, .reg2 = cpu_cc_src, .use_reg2 = true }; break;