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Iglesias'" , Peter Maydell , Subject: [PATCH v2 1/3] hw/misc/zynq_slcr: Add BootMode property Date: Wed, 19 Jun 2024 14:46:30 +0530 Message-ID: <20240619091632.2825550-2-sai.pavan.boddu@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240619091632.2825550-1-sai.pavan.boddu@amd.com> References: <20240619091632.2825550-1-sai.pavan.boddu@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: sai.pavan.boddu@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022570:EE_|CY8PR12MB7241:EE_ X-MS-Office365-Filtering-Correlation-Id: d05d77a5-d018-4c56-8987-08dc90408cdf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230037|82310400023|1800799021|36860700010|376011; X-Microsoft-Antispam-Message-Info: mTZaVEqdlp51MyquSdtChUjHtk0YnNGqvTKgD++yCPC/7pS6oBZoXgpt+uIF9Y67WDq6227UIWdWBWOXLgaG540zcfoJmBBAZflZPHhxpy9qsap/USFvRD2DjSXbzjIZoQLZFOw6u5ZZq857DceX9kpk0c95QzxhkZpXkvS2lpjZXqVIPhM/GQfvzN0gxGqdf+uwitI1FFjMA25AOyCLHni817wdCwjgNaD3j4HRgCZqVoEOPCA+cQnJpsIAXcFrvrxx9wZBTpeifcqK0wSjWhv9I/h0Z2VhGVGOSVYhXarYdiHjSE0fQRVgqRrz5qMdLdrUA/cJw3H2ehe9huZdVTfQ2fbLjBk+zuLtxlwh1E9DpBPdmY5EkrCI956CqKfQQ+AOnuUZSX6tn1xyZYCmVRpmZHYFRjlDo8BdorpFKyizJzgG3QIaeeSu6uNNUEZtS5WAea5tcWNKqp119eRLTFe22th08YdvXNsHmOrHroriGH942NAYyZmqa0SmmtSLIESg7zk9xEGb6eKF9XPH42ysMT3fuK9AZ0ZA6pT13f1AEoAujkoMZXfVmBbeReeYZZHTIjkUc2PIHakgP10dVMghKsPQimriP3Swpk2tq3MXmLjffB7fFxJLGtunUffz4O9dPwmH2Y22/qW0E3nrp9kgaQ4S4IVs7f8ONm+kOSFpt4w2qKwDFQ4pZ7j88GxNQn0cPS3q11khXOcT8MQh+YJyjfA9c9epAntEygZ61276a8/78L/bj0ijJuew6qvtAMXQLPPprFD7ELaDqI7Byq9ceYJnDgGBCVZbCSpQr3qkR2OIrTPZ2Etmx6Faj1K7yRXS2OdTl2VLrheVepfiq5+HbTjNEm7E+dVl0Fw1SpugqgA6B5M/CG7JVHxAceCCnihZjLV9xBcUEkqQ/+UuuqD1DuGBoDz+Xn2U7YBNDaxKWSr08Bxc0wyFZn2VLktgux21G9UMOz92EwaWnN+Ijay6WnOYlXWsCm7TRoMz8984NoT+gFiCFp1fO36t5Jq9fcCj0aRjDps9i3MPwqHEdHNuJ7p6/vswUHOSqpM3gHHIKBltQHD2h5qzGieArgvGcU2suif3ul7iyaq3w/DIjxFJ4TvRsfguE7lLnan05TNPDJrPLO4AcujynmjWMGwQnWVrMQ3XgCQfp16yIOlQP7n/Va4vHc2A/LC/ULsHwlpLGuquUG5Z9lF1uEiozIi4CHJ+SHoQyoVhKLNdjeTTKzT2jMCbLN2+PLpW/wGcgWcQVgzyDXGBNfLmQfSF7tUo1PB3gF/lg3TuWM97Jgqce3k6fxkrseV+89UrfZqSKHngsKztxkEROImMVM1natQJHruJYdSB6gM/U0HhDSRZxvLT7c7sPLMytx57iWlKbYaOz+rxkNQIj8+QLEecXf1u5m80AUolfALCKI/kxzsn0w== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230037)(82310400023)(1800799021)(36860700010)(376011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jun 2024 09:16:49.4909 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d05d77a5-d018-4c56-8987-08dc90408cdf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7241 Received-SPF: permerror client-ip=2a01:111:f403:2417::601; envelope-from=sai.pavan.boddu@amd.com; helo=NAM12-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.148, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org BootMode property sets user values into BOOT_MODE register, on hardware these are derived from board switches. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/misc/zynq_slcr.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index 3412ff099ea..ad814c3a79b 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -24,6 +24,8 @@ #include "hw/registerfields.h" #include "hw/qdev-clock.h" #include "qom/object.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" #ifndef ZYNQ_SLCR_ERR_DEBUG #define ZYNQ_SLCR_ERR_DEBUG 0 @@ -121,6 +123,7 @@ REG32(RST_REASON, 0x250) REG32(REBOOT_STATUS, 0x258) REG32(BOOT_MODE, 0x25c) + FIELD(BOOT_MODE, BOOT_MODE, 0, 4) REG32(APU_CTRL, 0x300) REG32(WDT_CLK_SEL, 0x304) @@ -195,6 +198,7 @@ struct ZynqSLCRState { Clock *ps_clk; Clock *uart0_ref_clk; Clock *uart1_ref_clk; + uint8_t boot_mode; }; /* @@ -371,7 +375,7 @@ static void zynq_slcr_reset_init(Object *obj, ResetType type) s->regs[R_FPGA_RST_CTRL] = 0x01F33F0F; s->regs[R_RST_REASON] = 0x00000040; - s->regs[R_BOOT_MODE] = 0x00000001; + s->regs[R_BOOT_MODE] = s->boot_mode & R_BOOT_MODE_BOOT_MODE_MASK; /* 0x700 - 0x7D4 */ for (i = 0; i < 54; i++) { @@ -588,6 +592,15 @@ static const ClockPortInitArray zynq_slcr_clocks = { QDEV_CLOCK_END }; +static void zynq_slcr_realize(DeviceState *dev, Error **errp) +{ + ZynqSLCRState *s = ZYNQ_SLCR(dev); + + if (s->boot_mode > 0xF) { + error_setg(errp, "Invalid boot mode %d specified", s->boot_mode); + } +} + static void zynq_slcr_init(Object *obj) { ZynqSLCRState *s = ZYNQ_SLCR(obj); @@ -610,15 +623,22 @@ static const VMStateDescription vmstate_zynq_slcr = { } }; +static Property zynq_slcr_props[] = { + DEFINE_PROP_UINT8("boot-mode", ZynqSLCRState, boot_mode, 1), + DEFINE_PROP_END_OF_LIST(), +}; + static void zynq_slcr_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ResettableClass *rc = RESETTABLE_CLASS(klass); dc->vmsd = &vmstate_zynq_slcr; + dc->realize = zynq_slcr_realize; rc->phases.enter = zynq_slcr_reset_init; rc->phases.hold = zynq_slcr_reset_hold; rc->phases.exit = zynq_slcr_reset_exit; + device_class_set_props(dc, zynq_slcr_props); } static const TypeInfo zynq_slcr_info = {