| Message ID | 20240619091632.2825550-4-sai.pavan.boddu@amd.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add boot-mode property for zynq | expand |
On Wed, Jun 19, 2024 at 11:16 AM Sai Pavan Boddu <sai.pavan.boddu@amd.com> wrote: > Added the supported device list and an example command. > > Thanks Sai! You need to add an entry in the Xilinx Zynq section of the MAINTAINERS file, e.g: F: docs/system/arm/xlnx-zynq.rst I would also list the supported boot-mode values in lower-case or the boot-mode example in upper-case. I know case doesn't matter but it would be nice to have the example consistent with the list of supported values. With those changes feel free to add: Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Cheers, Edgar > Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> > --- > docs/system/arm/xlnx-zynq.rst | 47 +++++++++++++++++++++++++++++++++++ > docs/system/target-arm.rst | 1 + > 2 files changed, 48 insertions(+) > create mode 100644 docs/system/arm/xlnx-zynq.rst > > diff --git a/docs/system/arm/xlnx-zynq.rst b/docs/system/arm/xlnx-zynq.rst > new file mode 100644 > index 00000000000..419cc1aec8b > --- /dev/null > +++ b/docs/system/arm/xlnx-zynq.rst > @@ -0,0 +1,47 @@ > +Xilinx Zynq board (``xilinx-zynq-a9``) > +====================================== > +The Zynq 7000 family is based on the AMD SoC architecture. These products > +integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based > +processing system (PS) and AMD programmable logic (PL) in a single device. > + > +More details here: > + > https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual > + > +QEMU xilinx-zynq-a9 board supports following devices: > + - A9 MPCORE > + - cortex-a9 > + - GIC v1 > + - Generic timer > + - wdt > + - OCM 256KB > + - SMC SRAM@0xe2000000 64MB > + - Zynq SLCR > + - SPI x2 > + - QSPI > + - UART > + - TTC x2 > + - Gigabit Ethernet Controller x2 > + - SD Controller x2 > + - XADC > + - Arm PrimeCell DMA Controller > + - DDR Memory > + - USB 2.0 x2 > + > +Running > +""""""" > +Direct Linux boot of a generic ARM upstream Linux kernel: > + > +.. code-block:: bash > + > + $ qemu-system-aarch64 -M xilinx-zynq-a9 \ > + -dtb zynq-zc702.dtb -serial null -serial mon:stdio \ > + -display none -m 1024 \ > + -initrd rootfs.cpio.gz -kernel zImage > + > +For configuring the boot-mode provide the following on the command line: > + > +.. code-block:: bash > + > + -machine boot-mode=qspi > + > +Supported values are JTAG, SD, QSPI, NOR. > diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst > index 870d30e3502..7b992722846 100644 > --- a/docs/system/target-arm.rst > +++ b/docs/system/target-arm.rst > @@ -109,6 +109,7 @@ undocumented; you can get a complete list by running > arm/virt > arm/xenpvh > arm/xlnx-versal-virt > + arm/xlnx-zynq > > Emulated CPU architecture support > ================================= > -- > 2.34.1 > >
diff --git a/docs/system/arm/xlnx-zynq.rst b/docs/system/arm/xlnx-zynq.rst new file mode 100644 index 00000000000..419cc1aec8b --- /dev/null +++ b/docs/system/arm/xlnx-zynq.rst @@ -0,0 +1,47 @@ +Xilinx Zynq board (``xilinx-zynq-a9``) +====================================== +The Zynq 7000 family is based on the AMD SoC architecture. These products +integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based +processing system (PS) and AMD programmable logic (PL) in a single device. + +More details here: +https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual + +QEMU xilinx-zynq-a9 board supports following devices: + - A9 MPCORE + - cortex-a9 + - GIC v1 + - Generic timer + - wdt + - OCM 256KB + - SMC SRAM@0xe2000000 64MB + - Zynq SLCR + - SPI x2 + - QSPI + - UART + - TTC x2 + - Gigabit Ethernet Controller x2 + - SD Controller x2 + - XADC + - Arm PrimeCell DMA Controller + - DDR Memory + - USB 2.0 x2 + +Running +""""""" +Direct Linux boot of a generic ARM upstream Linux kernel: + +.. code-block:: bash + + $ qemu-system-aarch64 -M xilinx-zynq-a9 \ + -dtb zynq-zc702.dtb -serial null -serial mon:stdio \ + -display none -m 1024 \ + -initrd rootfs.cpio.gz -kernel zImage + +For configuring the boot-mode provide the following on the command line: + +.. code-block:: bash + + -machine boot-mode=qspi + +Supported values are JTAG, SD, QSPI, NOR. diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 870d30e3502..7b992722846 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -109,6 +109,7 @@ undocumented; you can get a complete list by running arm/virt arm/xenpvh arm/xlnx-versal-virt + arm/xlnx-zynq Emulated CPU architecture support =================================
Added the supported device list and an example command. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> --- docs/system/arm/xlnx-zynq.rst | 47 +++++++++++++++++++++++++++++++++++ docs/system/target-arm.rst | 1 + 2 files changed, 48 insertions(+) create mode 100644 docs/system/arm/xlnx-zynq.rst