diff mbox series

[v2,3/6] tests/tcg/aarch64: Explicitly specify register width

Message ID 20240627-tcg-v2-3-1690a813348e@daynix.com (mailing list archive)
State New
Headers show
Series tests/tcg/aarch64: Fix inline assemblies for clang | expand

Commit Message

Akihiko Odaki June 27, 2024, 1:58 p.m. UTC
clang version 18.1.6 assumes a register is 64-bit by default and
complains if a 32-bit value is given. Explicitly specify register width
when passing a 32-bit value.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 tests/tcg/aarch64/bti-1.c | 6 +++---
 tests/tcg/aarch64/bti-3.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Richard Henderson June 28, 2024, 5:19 p.m. UTC | #1
On 6/27/24 06:58, Akihiko Odaki wrote:
> clang version 18.1.6 assumes a register is 64-bit by default and
> complains if a 32-bit value is given. Explicitly specify register width
> when passing a 32-bit value.
> 
> Signed-off-by: Akihiko Odaki<akihiko.odaki@daynix.com>
> Reviewed-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   tests/tcg/aarch64/bti-1.c | 6 +++---
>   tests/tcg/aarch64/bti-3.c | 6 +++---
>   2 files changed, 6 insertions(+), 6 deletions(-)

This is true of clang 14 as well, so perhaps remove the version statement entirely.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Akihiko Odaki June 29, 2024, 8:54 a.m. UTC | #2
On 2024/06/29 2:19, Richard Henderson wrote:
> On 6/27/24 06:58, Akihiko Odaki wrote:
>> clang version 18.1.6 assumes a register is 64-bit by default and
>> complains if a 32-bit value is given. Explicitly specify register width
>> when passing a 32-bit value.
>>
>> Signed-off-by: Akihiko Odaki<akihiko.odaki@daynix.com>
>> Reviewed-by: Philippe Mathieu-Daudé<philmd@linaro.org>
>> ---
>>   tests/tcg/aarch64/bti-1.c | 6 +++---
>>   tests/tcg/aarch64/bti-3.c | 6 +++---
>>   2 files changed, 6 insertions(+), 6 deletions(-)
> 
> This is true of clang 14 as well, so perhaps remove the version 
> statement entirely.

I noted the version because I think it is totally fine for clang to 
choose an appropriate register width instead of complaining about it and 
a future version may do so.

> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks for reviewing this series,
Akihiko Odaki
diff mbox series

Patch

diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c
index 99a879af23d4..1fada8108d22 100644
--- a/tests/tcg/aarch64/bti-1.c
+++ b/tests/tcg/aarch64/bti-1.c
@@ -17,15 +17,15 @@  static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc)
 #define BTI_JC    "hint #38"
 
 #define BTYPE_1(DEST) \
-    asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \
+    asm("mov %w0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %w0,#0" \
         : "=r"(skipped) : : "x16")
 
 #define BTYPE_2(DEST) \
-    asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \
+    asm("mov %w0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %w0,#0" \
         : "=r"(skipped) : : "x16", "x30")
 
 #define BTYPE_3(DEST) \
-    asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \
+    asm("mov %w0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %w0,#0" \
         : "=r"(skipped) : : "x15")
 
 #define TEST(WHICH, DEST, EXPECT) \
diff --git a/tests/tcg/aarch64/bti-3.c b/tests/tcg/aarch64/bti-3.c
index 8c534c09d784..6a3bd037bcd6 100644
--- a/tests/tcg/aarch64/bti-3.c
+++ b/tests/tcg/aarch64/bti-3.c
@@ -11,15 +11,15 @@  static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc)
 }
 
 #define BTYPE_1() \
-    asm("mov %0,#1; adr x16, 1f; br x16; 1: hint #25; mov %0,#0" \
+    asm("mov %w0,#1; adr x16, 1f; br x16; 1: hint #25; mov %w0,#0" \
         : "=r"(skipped) : : "x16", "x30")
 
 #define BTYPE_2() \
-    asm("mov %0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %0,#0" \
+    asm("mov %w0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %w0,#0" \
         : "=r"(skipped) : : "x16", "x30")
 
 #define BTYPE_3() \
-    asm("mov %0,#1; adr x15, 1f; br x15; 1: hint #25; mov %0,#0" \
+    asm("mov %w0,#1; adr x15, 1f; br x15; 1: hint #25; mov %w0,#0" \
         : "=r"(skipped) : : "x15", "x30")
 
 #define TEST(WHICH, EXPECT) \