diff mbox series

[2/6] target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32

Message ID 20240701033722.954-3-zhiwei_liu@linux.alibaba.com (mailing list archive)
State New
Headers show
Series target/riscv: Expose RV32 cpu to RV64 QEMU | expand

Commit Message

LIU Zhiwei July 1, 2024, 3:37 a.m. UTC 
From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>

Ensure pmp_size is correctly determined using mxl for RV32
in RV64 QEMU.

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 target/riscv/pmp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 9eea397e72..f65aa3dba7 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -326,7 +326,7 @@  bool pmp_hart_has_privs(CPURISCVState *env, hwaddr addr,
              */
             pmp_size = -(addr | TARGET_PAGE_MASK);
         } else {
-            pmp_size = sizeof(target_ulong);
+            pmp_size = 2UL << riscv_cpu_mxl(env);
         }
     } else {
         pmp_size = size;