From patchwork Thu Jul 4 05:36:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 13723254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C87C7C30653 for ; Thu, 4 Jul 2024 05:38:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sPF9w-00021Q-Ri; Thu, 04 Jul 2024 01:37:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sPF9u-0001z4-Tx for qemu-devel@nongnu.org; Thu, 04 Jul 2024 01:37:30 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sPF9s-000274-AR for qemu-devel@nongnu.org; Thu, 04 Jul 2024 01:37:30 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1720071445; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O8lH6wIoM/ezJP1WZs4L4t0IZZNM224Qy72wkgMaMaU=; b=Q1TIKTUQHSpUX/BeEIX0NVb7bS3VhwTLlwJKwPlvT6u7uHuh+JrVnyTAbo0vpHzYxUef8g LU/C0jgjS56UH9+LGYui9wNCIRm4HipLPAY88IjRdKRmAhs4sEXNG2g9O19BGzBDiC2wRC c2hr9qU7qh8ZRfwcLlMV/mzhWB6zvfQ= Received: from mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-178-eZQgGlROOnuX_jkvK2rr1g-1; Thu, 04 Jul 2024 01:37:20 -0400 X-MC-Unique: eZQgGlROOnuX_jkvK2rr1g-1 Received: from mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.15]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id EAEDD1955F67; Thu, 4 Jul 2024 05:37:18 +0000 (UTC) Received: from corto.redhat.com (unknown [10.39.192.90]) by mx-prod-int-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1E1C61955F4B; Thu, 4 Jul 2024 05:37:14 +0000 (UTC) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Andrew Jeffery , Joel Stanley , Steven Lee , Troy Lee , Jamin Lin , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH 5/8] aspeed: Set eMMC 'boot-config' property to reflect HW strapping Date: Thu, 4 Jul 2024 07:36:48 +0200 Message-ID: <20240704053651.1100732-6-clg@redhat.com> In-Reply-To: <20240704053651.1100732-1-clg@redhat.com> References: <20240704053651.1100732-1-clg@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15 Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Cédric Le Goater When the boot-from-eMMC HW strapping bit is set, use the 'boot-config' property to set the boot config register to boot from the first boot area partition of the eMMC device. Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery --- hw/arm/aspeed.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 756deb91efd1..135f4eb72215 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -327,7 +327,8 @@ void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, } } -static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc) +static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc, + bool boot_emmc) { DeviceState *card; @@ -335,6 +336,9 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc) return; } card = qdev_new(emmc ? TYPE_EMMC : TYPE_SD_CARD); + if (emmc) { + qdev_prop_set_uint8(card, "boot-config", boot_emmc ? 0x48 : 0x0); + } qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); qdev_realize_and_unref(card, @@ -365,6 +369,7 @@ static void aspeed_machine_init(MachineState *machine) AspeedSoCClass *sc; int i; DriveInfo *emmc0 = NULL; + bool boot_emmc; bmc->soc = ASPEED_SOC(object_new(amc->soc_name)); object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc)); @@ -437,19 +442,21 @@ static void aspeed_machine_init(MachineState *machine) for (i = 0; i < bmc->soc->sdhci.num_slots; i++) { sdhci_attach_drive(&bmc->soc->sdhci.slots[i], - drive_get(IF_SD, 0, i), false); + drive_get(IF_SD, 0, i), false, false); } + boot_emmc = sc->boot_from_emmc(bmc->soc); + if (bmc->soc->emmc.num_slots) { emmc0 = drive_get(IF_SD, 0, bmc->soc->sdhci.num_slots); - sdhci_attach_drive(&bmc->soc->emmc.slots[0], emmc0, true); + sdhci_attach_drive(&bmc->soc->emmc.slots[0], emmc0, true, boot_emmc); } if (!bmc->mmio_exec) { DeviceState *dev = ssi_get_cs(bmc->soc->fmc.spi, 0); BlockBackend *fmc0 = dev ? m25p80_get_blk(dev) : NULL; - if (fmc0) { + if (fmc0 && !boot_emmc) { uint64_t rom_size = memory_region_size(&bmc->soc->spi_boot); aspeed_install_boot_rom(bmc, fmc0, rom_size); } else if (emmc0) {