[3/3] hw/isa/piix: Resolve intermediate IRQ forwarder

Commit Message

Bernhard Beschow July 4, 2024, 8:58 p.m. UTC

When @cpu_intr is populated before pixx4's realize(), it can be directly passed
to i8259_init(), avoiding the need for the intermediate piix_request_i8259_irq()
handler. The result is less code and runtime overhead, and a fixed memory leak
caused by qemu_allocate_irqs().

Inspired-by: Philippe Mathieu-Daudé <[e-mail]>
Signed-off-by: Bernhard Beschow <[e-mail]>
---
 hw/isa/piix.c   | 13 ++-----------
 hw/mips/malta.c |  4 +---
 2 files changed, 3 insertions(+), 14 deletions(-)

Patch

diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 2d30711b17..e070628f25 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -81,12 +81,6 @@  static void piix_set_pci_irq(void *opaque, int pirq, int level)
     piix_set_pci_irq_level(s, pirq, level);
 }
 
-static void piix_request_i8259_irq(void *opaque, int irq, int level)
-{
-    PIIXState *s = opaque;
-    qemu_set_irq(s->cpu_intr, level);
-}
-
 static PCIINTxRoute piix_route_intx_pin_to_irq(void *opaque, int pin)
 {
     PCIDevice *pci_dev = opaque;
@@ -315,9 +309,7 @@  static void pci_piix_realize(PCIDevice *dev, const char *uhci_type,
 
     /* PIC */
     if (d->has_pic) {
-        qemu_irq *i8259_out_irq = qemu_allocate_irqs(piix_request_i8259_irq, d,
-                                                     1);
-        qemu_irq *i8259 = i8259_init(isa_bus, *i8259_out_irq);
+        qemu_irq *i8259 = i8259_init(isa_bus, d->cpu_intr);
         size_t i;
 
         for (i = 0; i < ISA_NUM_IRQS; i++) {
@@ -325,8 +317,6 @@  static void pci_piix_realize(PCIDevice *dev, const char *uhci_type,
         }
 
         g_free(i8259);
-
-        qdev_init_gpio_out_named(DEVICE(dev), &d->cpu_intr, "intr", 1);
     }
 
     isa_bus_register_input_irqs(isa_bus, d->isa_irqs_in);
@@ -402,6 +392,7 @@  static void pci_piix_init(Object *obj)
 {
     PIIXState *d = PIIX_PCI_DEVICE(obj);
 
+    qdev_init_gpio_out_named(DEVICE(obj), &d->cpu_intr, "intr", 1);
     qdev_init_gpio_out_named(DEVICE(obj), d->isa_irqs_in, "isa-irqs",
                              ISA_NUM_IRQS);
 
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 664a2ae0a9..50823bd5fb 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1238,15 +1238,13 @@  void mips_malta_init(MachineState *machine)
     /* Southbridge */
     piix4 = pci_new_multifunction(PIIX4_PCI_DEVFN, TYPE_PIIX4_PCI_DEVICE);
     qdev_prop_set_uint32(DEVICE(piix4), "smb_io_base", 0x1100);
+    qdev_connect_gpio_out_named(DEVICE(piix4), "intr", 0, i8259_irq);
     pci_realize_and_unref(piix4, pci_bus, &error_fatal);
     isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix4), "isa.0"));
 
     dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "ide"));
     pci_ide_create_devs(PCI_DEVICE(dev));
 
-    /* Interrupt controller */
-    qdev_connect_gpio_out_named(DEVICE(piix4), "intr", 0, i8259_irq);
-
     /* generate SPD EEPROM data */
     dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "pm"));
     smbus = I2C_BUS(qdev_get_child_bus(dev, "i2c"));