| Message ID | 20240730045544.2516284-4-zhao1.liu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i386: Clean up SGX for microvm, completely | expand |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7a6d0b05ce27..7f55e9ba3ed8 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1734,6 +1734,18 @@ static FeatureDep feature_dependencies[] = { .from = { FEAT_7_0_EBX, CPUID_7_0_EBX_SGX }, .to = { FEAT_7_0_ECX, CPUID_7_0_ECX_SGX_LC }, }, + { + .from = { FEAT_7_0_EBX, CPUID_7_0_EBX_SGX }, + .to = { FEAT_SGX_12_0_EAX, ~0ull }, + }, + { + .from = { FEAT_7_0_EBX, CPUID_7_0_EBX_SGX }, + .to = { FEAT_SGX_12_0_EBX, ~0ull }, + }, + { + .from = { FEAT_7_0_EBX, CPUID_7_0_EBX_SGX }, + .to = { FEAT_SGX_12_1_EAX, ~0ull }, + }, }; typedef struct X86RegisterInfo32 {
As SDM stated, CPUID 0x12 leaves depend on CPUID_7_0_EBX_SGX (SGX feature word). Since FEAT_SGX_12_0_EAX, FEAT_SGX_12_0_EBX and FEAT_SGX_12_1_EAX define multiple feature words, add the dependencies of those registers to report the warning to user if SGX is absent. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> --- target/i386/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)