diff mbox series

[03/18] bsd-user: Implement RISC-V CPU register cloning and reset functions

Message ID 20240802083423.142365-4-itachis@FreeBSD.org (mailing list archive)
State New, archived
Headers show
Series bsd-user: Comprehensive RISCV support | expand

Commit Message

Ajeet Singh Aug. 2, 2024, 8:34 a.m. UTC
From: Mark Corbin <mark.corbin@embecsom.com>

Added functions for cloning CPU registers and resetting the CPU state
for RISC-V architecture.

Signed-off-by: Mark Corbin <mark.corbin@embecsom.com>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
---
 bsd-user/riscv/target_arch_cpu.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Richard Henderson Aug. 2, 2024, 12:58 p.m. UTC | #1
On 8/2/24 18:34, Ajeet Singh wrote:
> From: Mark Corbin <mark.corbin@embecsom.com>
> 
> Added functions for cloning CPU registers and resetting the CPU state
> for RISC-V architecture.
> 
> Signed-off-by: Mark Corbin <mark.corbin@embecsom.com>
> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
> ---
>   bsd-user/riscv/target_arch_cpu.h | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h
> index 5b436b2ac9..53db790517 100644
> --- a/bsd-user/riscv/target_arch_cpu.h
> +++ b/bsd-user/riscv/target_arch_cpu.h
> @@ -130,4 +130,18 @@ static inline void target_cpu_loop(CPURISCVState *env)
>       }
>   }
>   
> +static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp)
> +{
> +    if (newsp) {
> +        env->gpr[xSP] = newsp;
> +    }
> +
> +    env->gpr[xA0] = 0; /* a0 */
> +    env->gpr[5] = 0;   /* t0 */

There is an xT0 define too.
That probably obviates the two comments.

With that,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/bsd-user/riscv/target_arch_cpu.h b/bsd-user/riscv/target_arch_cpu.h
index 5b436b2ac9..53db790517 100644
--- a/bsd-user/riscv/target_arch_cpu.h
+++ b/bsd-user/riscv/target_arch_cpu.h
@@ -130,4 +130,18 @@  static inline void target_cpu_loop(CPURISCVState *env)
     }
 }
 
+static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp)
+{
+    if (newsp) {
+        env->gpr[xSP] = newsp;
+    }
+
+    env->gpr[xA0] = 0; /* a0 */
+    env->gpr[5] = 0;   /* t0 */
+}
+
+static inline void target_cpu_reset(CPUArchState *env)
+{
+}
+
 #endif /* TARGET_ARCH_CPU_H */