diff mbox series

intel_iommu: Fix invalidation descriptor type field

Message ID 20240813055354.2562736-1-zhenzhong.duan@intel.com (mailing list archive)
State New, archived
Headers show
Series intel_iommu: Fix invalidation descriptor type field | expand

Commit Message

Duan, Zhenzhong Aug. 13, 2024, 5:53 a.m. UTC 
According to spec, invalidation descriptor type is 7bits which is
concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.

Currently we only pick bits[3:0] as the invalidation type and treat
bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
is zero for all current invalidation types. But it will break if newer
type occupies bits[11:9].

Fix it by take bits[11:9] into type and make reserved bits check accurate.

Suggested-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
---
Tested intel-iommu.flat in kvm-unit-test: PASS
Tested vfio device hotplug: PASS
---
 hw/i386/intel_iommu_internal.h | 11 ++++++-----
 hw/i386/intel_iommu.c          |  2 +-
 2 files changed, 7 insertions(+), 6 deletions(-)

Comments

Yi Liu Aug. 13, 2024, 7:06 a.m. UTC | #1 
On 2024/8/13 13:53, Zhenzhong Duan wrote:
> According to spec, invalidation descriptor type is 7bits which is
> concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.
> 
> Currently we only pick bits[3:0] as the invalidation type and treat
> bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
> is zero for all current invalidation types. But it will break if newer
> type occupies bits[11:9].
> 
> Fix it by take bits[11:9] into type and make reserved bits check accurate.

s/take/taking/

Reviewed-by: Yi Liu <yi.l.liu@intel.com>

There is another fix you may add. In vtd_process_inv_desc(), it should
treat the type VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB as invalid type
if vIOMMU is running in legacy mode.

> Suggested-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
> Tested intel-iommu.flat in kvm-unit-test: PASS
> Tested vfio device hotplug: PASS
> ---
>   hw/i386/intel_iommu_internal.h | 11 ++++++-----
>   hw/i386/intel_iommu.c          |  2 +-
>   2 files changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 5f32c36943..13d5d129ae 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -356,7 +356,8 @@ union VTDInvDesc {
>   typedef union VTDInvDesc VTDInvDesc;
>   
>   /* Masks for struct VTDInvDesc */
> -#define VTD_INV_DESC_TYPE               0xf
> +#define VTD_INV_DESC_TYPE(val)          ((((val) >> 5) & 0x70ULL) | \
> +                                         ((val) & 0xfULL))
>   #define VTD_INV_DESC_CC                 0x1 /* Context-cache Invalidate Desc */
>   #define VTD_INV_DESC_IOTLB              0x2
>   #define VTD_INV_DESC_DEVICE             0x3
> @@ -372,7 +373,7 @@ typedef union VTDInvDesc VTDInvDesc;
>   #define VTD_INV_DESC_WAIT_IF            (1ULL << 4)
>   #define VTD_INV_DESC_WAIT_FN            (1ULL << 6)
>   #define VTD_INV_DESC_WAIT_DATA_SHIFT    32
> -#define VTD_INV_DESC_WAIT_RSVD_LO       0Xffffff80ULL
> +#define VTD_INV_DESC_WAIT_RSVD_LO       0Xfffff180ULL
>   #define VTD_INV_DESC_WAIT_RSVD_HI       3ULL
>   
>   /* Masks for Context-cache Invalidation Descriptor */
> @@ -383,7 +384,7 @@ typedef union VTDInvDesc VTDInvDesc;
>   #define VTD_INV_DESC_CC_DID(val)        (((val) >> 16) & VTD_DOMAIN_ID_MASK)
>   #define VTD_INV_DESC_CC_SID(val)        (((val) >> 32) & 0xffffUL)
>   #define VTD_INV_DESC_CC_FM(val)         (((val) >> 48) & 3UL)
> -#define VTD_INV_DESC_CC_RSVD            0xfffc00000000ffc0ULL
> +#define VTD_INV_DESC_CC_RSVD            0xfffc00000000f1c0ULL
>   
>   /* Masks for IOTLB Invalidate Descriptor */
>   #define VTD_INV_DESC_IOTLB_G            (3ULL << 4)
> @@ -393,7 +394,7 @@ typedef union VTDInvDesc VTDInvDesc;
>   #define VTD_INV_DESC_IOTLB_DID(val)     (((val) >> 16) & VTD_DOMAIN_ID_MASK)
>   #define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL)
>   #define VTD_INV_DESC_IOTLB_AM(val)      ((val) & 0x3fULL)
> -#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000ff00ULL
> +#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000f100ULL
>   #define VTD_INV_DESC_IOTLB_RSVD_HI      0xf80ULL
>   #define VTD_INV_DESC_IOTLB_PASID_PASID  (2ULL << 4)
>   #define VTD_INV_DESC_IOTLB_PASID_PAGE   (3ULL << 4)
> @@ -406,7 +407,7 @@ typedef union VTDInvDesc VTDInvDesc;
>   #define VTD_INV_DESC_DEVICE_IOTLB_SIZE(val) ((val) & 0x1)
>   #define VTD_INV_DESC_DEVICE_IOTLB_SID(val) (((val) >> 32) & 0xFFFFULL)
>   #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
> -#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
> +#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
>   
>   /* Rsvd field masks for spte */
>   #define VTD_SPTE_SNP 0x800ULL
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 16d2885fcc..68cb72a481 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2744,7 +2744,7 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
>           return false;
>       }
>   
> -    desc_type = inv_desc.lo & VTD_INV_DESC_TYPE;
> +    desc_type = VTD_INV_DESC_TYPE(inv_desc.lo);
>       /* FIXME: should update at first or at last? */
>       s->iq_last_desc_type = desc_type;
>
Duan, Zhenzhong Aug. 13, 2024, 7:24 a.m. UTC | #2 
>-----Original Message-----
>From: Liu, Yi L <yi.l.liu@intel.com>
>Subject: Re: [PATCH] intel_iommu: Fix invalidation descriptor type field
>
>On 2024/8/13 13:53, Zhenzhong Duan wrote:
>> According to spec, invalidation descriptor type is 7bits which is
>> concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.
>>
>> Currently we only pick bits[3:0] as the invalidation type and treat
>> bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
>> is zero for all current invalidation types. But it will break if newer
>> type occupies bits[11:9].
>>
>> Fix it by take bits[11:9] into type and make reserved bits check accurate.
>
>s/take/taking/

Will fix.

>
>Reviewed-by: Yi Liu <yi.l.liu@intel.com>
>
>There is another fix you may add. In vtd_process_inv_desc(), it should
>treat the type VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB as invalid type
>if vIOMMU is running in legacy mode.

Ah, indeed, will fix with a new adding patch. Thanks for suggesting.

>
>> Suggested-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
>> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>> ---
>> Tested intel-iommu.flat in kvm-unit-test: PASS
>> Tested vfio device hotplug: PASS
>> ---
>>   hw/i386/intel_iommu_internal.h | 11 ++++++-----
>>   hw/i386/intel_iommu.c          |  2 +-
>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/hw/i386/intel_iommu_internal.h
>b/hw/i386/intel_iommu_internal.h
>> index 5f32c36943..13d5d129ae 100644
>> --- a/hw/i386/intel_iommu_internal.h
>> +++ b/hw/i386/intel_iommu_internal.h
>> @@ -356,7 +356,8 @@ union VTDInvDesc {
>>   typedef union VTDInvDesc VTDInvDesc;
>>
>>   /* Masks for struct VTDInvDesc */
>> -#define VTD_INV_DESC_TYPE               0xf
>> +#define VTD_INV_DESC_TYPE(val)          ((((val) >> 5) & 0x70ULL) | \
>> +                                         ((val) & 0xfULL))
>>   #define VTD_INV_DESC_CC                 0x1 /* Context-cache Invalidate Desc
>*/
>>   #define VTD_INV_DESC_IOTLB              0x2
>>   #define VTD_INV_DESC_DEVICE             0x3
>> @@ -372,7 +373,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_WAIT_IF            (1ULL << 4)
>>   #define VTD_INV_DESC_WAIT_FN            (1ULL << 6)
>>   #define VTD_INV_DESC_WAIT_DATA_SHIFT    32
>> -#define VTD_INV_DESC_WAIT_RSVD_LO       0Xffffff80ULL
>> +#define VTD_INV_DESC_WAIT_RSVD_LO       0Xfffff180ULL
>>   #define VTD_INV_DESC_WAIT_RSVD_HI       3ULL
>>
>>   /* Masks for Context-cache Invalidation Descriptor */
>> @@ -383,7 +384,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_CC_DID(val)        (((val) >> 16) &
>VTD_DOMAIN_ID_MASK)
>>   #define VTD_INV_DESC_CC_SID(val)        (((val) >> 32) & 0xffffUL)
>>   #define VTD_INV_DESC_CC_FM(val)         (((val) >> 48) & 3UL)
>> -#define VTD_INV_DESC_CC_RSVD            0xfffc00000000ffc0ULL
>> +#define VTD_INV_DESC_CC_RSVD            0xfffc00000000f1c0ULL
>>
>>   /* Masks for IOTLB Invalidate Descriptor */
>>   #define VTD_INV_DESC_IOTLB_G            (3ULL << 4)
>> @@ -393,7 +394,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_IOTLB_DID(val)     (((val) >> 16) &
>VTD_DOMAIN_ID_MASK)
>>   #define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL)
>>   #define VTD_INV_DESC_IOTLB_AM(val)      ((val) & 0x3fULL)
>> -#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000ff00ULL
>> +#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000f100ULL
>>   #define VTD_INV_DESC_IOTLB_RSVD_HI      0xf80ULL
>>   #define VTD_INV_DESC_IOTLB_PASID_PASID  (2ULL << 4)
>>   #define VTD_INV_DESC_IOTLB_PASID_PAGE   (3ULL << 4)
>> @@ -406,7 +407,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_DEVICE_IOTLB_SIZE(val) ((val) & 0x1)
>>   #define VTD_INV_DESC_DEVICE_IOTLB_SID(val) (((val) >> 32) & 0xFFFFULL)
>>   #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
>> -#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
>> +#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
>>
>>   /* Rsvd field masks for spte */
>>   #define VTD_SPTE_SNP 0x800ULL
>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>> index 16d2885fcc..68cb72a481 100644
>> --- a/hw/i386/intel_iommu.c
>> +++ b/hw/i386/intel_iommu.c
>> @@ -2744,7 +2744,7 @@ static bool
>vtd_process_inv_desc(IntelIOMMUState *s)
>>           return false;
>>       }
>>
>> -    desc_type = inv_desc.lo & VTD_INV_DESC_TYPE;
>> +    desc_type = VTD_INV_DESC_TYPE(inv_desc.lo);
>>       /* FIXME: should update at first or at last? */
>>       s->iq_last_desc_type = desc_type;
>>
>
>--
>Regards,
>Yi Liu
CLEMENT MATHIEU--DRIF Aug. 13, 2024, 7:33 a.m. UTC | #3 
On 13/08/2024 09:06, Yi Liu wrote:
> Caution: External email. Do not open attachments or click links, 
> unless this email comes from a known sender and you know the content 
> is safe.
>
>
> On 2024/8/13 13:53, Zhenzhong Duan wrote:
>> According to spec, invalidation descriptor type is 7bits which is
>> concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.
>>
>> Currently we only pick bits[3:0] as the invalidation type and treat
>> bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
>> is zero for all current invalidation types. But it will break if newer
>> type occupies bits[11:9].
>>
>> Fix it by take bits[11:9] into type and make reserved bits check 
>> accurate.
>
> s/take/taking/
>
> Reviewed-by: Yi Liu <yi.l.liu@intel.com>

Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>

>
> There is another fix you may add. In vtd_process_inv_desc(), it should
> treat the type VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB as invalid type
> if vIOMMU is running in legacy mode.
PASID based device IOTLB invalidation as well
>
>> Suggested-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
>> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>> ---
>> Tested intel-iommu.flat in kvm-unit-test: PASS
>> Tested vfio device hotplug: PASS
>> ---
>>   hw/i386/intel_iommu_internal.h | 11 ++++++-----
>>   hw/i386/intel_iommu.c          |  2 +-
>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/hw/i386/intel_iommu_internal.h 
>> b/hw/i386/intel_iommu_internal.h
>> index 5f32c36943..13d5d129ae 100644
>> --- a/hw/i386/intel_iommu_internal.h
>> +++ b/hw/i386/intel_iommu_internal.h
>> @@ -356,7 +356,8 @@ union VTDInvDesc {
>>   typedef union VTDInvDesc VTDInvDesc;
>>
>>   /* Masks for struct VTDInvDesc */
>> -#define VTD_INV_DESC_TYPE               0xf
>> +#define VTD_INV_DESC_TYPE(val)          ((((val) >> 5) & 0x70ULL) | \
>> +                                         ((val) & 0xfULL))
>>   #define VTD_INV_DESC_CC                 0x1 /* Context-cache 
>> Invalidate Desc */
>>   #define VTD_INV_DESC_IOTLB              0x2
>>   #define VTD_INV_DESC_DEVICE             0x3
>> @@ -372,7 +373,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_WAIT_IF            (1ULL << 4)
>>   #define VTD_INV_DESC_WAIT_FN            (1ULL << 6)
>>   #define VTD_INV_DESC_WAIT_DATA_SHIFT    32
>> -#define VTD_INV_DESC_WAIT_RSVD_LO       0Xffffff80ULL
>> +#define VTD_INV_DESC_WAIT_RSVD_LO       0Xfffff180ULL
>>   #define VTD_INV_DESC_WAIT_RSVD_HI       3ULL
>>
>>   /* Masks for Context-cache Invalidation Descriptor */
>> @@ -383,7 +384,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_CC_DID(val)        (((val) >> 16) & 
>> VTD_DOMAIN_ID_MASK)
>>   #define VTD_INV_DESC_CC_SID(val)        (((val) >> 32) & 0xffffUL)
>>   #define VTD_INV_DESC_CC_FM(val)         (((val) >> 48) & 3UL)
>> -#define VTD_INV_DESC_CC_RSVD            0xfffc00000000ffc0ULL
>> +#define VTD_INV_DESC_CC_RSVD            0xfffc00000000f1c0ULL
>>
>>   /* Masks for IOTLB Invalidate Descriptor */
>>   #define VTD_INV_DESC_IOTLB_G            (3ULL << 4)
>> @@ -393,7 +394,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_IOTLB_DID(val)     (((val) >> 16) & 
>> VTD_DOMAIN_ID_MASK)
>>   #define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL)
>>   #define VTD_INV_DESC_IOTLB_AM(val)      ((val) & 0x3fULL)
>> -#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000ff00ULL
>> +#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000f100ULL
>>   #define VTD_INV_DESC_IOTLB_RSVD_HI      0xf80ULL
>>   #define VTD_INV_DESC_IOTLB_PASID_PASID  (2ULL << 4)
>>   #define VTD_INV_DESC_IOTLB_PASID_PAGE   (3ULL << 4)
>> @@ -406,7 +407,7 @@ typedef union VTDInvDesc VTDInvDesc;
>>   #define VTD_INV_DESC_DEVICE_IOTLB_SIZE(val) ((val) & 0x1)
>>   #define VTD_INV_DESC_DEVICE_IOTLB_SID(val) (((val) >> 32) & 0xFFFFULL)
>>   #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
>> -#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
>> +#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
>>
>>   /* Rsvd field masks for spte */
>>   #define VTD_SPTE_SNP 0x800ULL
>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>> index 16d2885fcc..68cb72a481 100644
>> --- a/hw/i386/intel_iommu.c
>> +++ b/hw/i386/intel_iommu.c
>> @@ -2744,7 +2744,7 @@ static bool 
>> vtd_process_inv_desc(IntelIOMMUState *s)
>>           return false;
>>       }
>>
>> -    desc_type = inv_desc.lo & VTD_INV_DESC_TYPE;
>> +    desc_type = VTD_INV_DESC_TYPE(inv_desc.lo);
>>       /* FIXME: should update at first or at last? */
>>       s->iq_last_desc_type = desc_type;
>>
>
> -- 
> Regards,
> Yi Liu
diff mbox series

Patch

diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index 5f32c36943..13d5d129ae 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -356,7 +356,8 @@  union VTDInvDesc {
 typedef union VTDInvDesc VTDInvDesc;
 
 /* Masks for struct VTDInvDesc */
-#define VTD_INV_DESC_TYPE               0xf
+#define VTD_INV_DESC_TYPE(val)          ((((val) >> 5) & 0x70ULL) | \
+                                         ((val) & 0xfULL))
 #define VTD_INV_DESC_CC                 0x1 /* Context-cache Invalidate Desc */
 #define VTD_INV_DESC_IOTLB              0x2
 #define VTD_INV_DESC_DEVICE             0x3
@@ -372,7 +373,7 @@  typedef union VTDInvDesc VTDInvDesc;
 #define VTD_INV_DESC_WAIT_IF            (1ULL << 4)
 #define VTD_INV_DESC_WAIT_FN            (1ULL << 6)
 #define VTD_INV_DESC_WAIT_DATA_SHIFT    32
-#define VTD_INV_DESC_WAIT_RSVD_LO       0Xffffff80ULL
+#define VTD_INV_DESC_WAIT_RSVD_LO       0Xfffff180ULL
 #define VTD_INV_DESC_WAIT_RSVD_HI       3ULL
 
 /* Masks for Context-cache Invalidation Descriptor */
@@ -383,7 +384,7 @@  typedef union VTDInvDesc VTDInvDesc;
 #define VTD_INV_DESC_CC_DID(val)        (((val) >> 16) & VTD_DOMAIN_ID_MASK)
 #define VTD_INV_DESC_CC_SID(val)        (((val) >> 32) & 0xffffUL)
 #define VTD_INV_DESC_CC_FM(val)         (((val) >> 48) & 3UL)
-#define VTD_INV_DESC_CC_RSVD            0xfffc00000000ffc0ULL
+#define VTD_INV_DESC_CC_RSVD            0xfffc00000000f1c0ULL
 
 /* Masks for IOTLB Invalidate Descriptor */
 #define VTD_INV_DESC_IOTLB_G            (3ULL << 4)
@@ -393,7 +394,7 @@  typedef union VTDInvDesc VTDInvDesc;
 #define VTD_INV_DESC_IOTLB_DID(val)     (((val) >> 16) & VTD_DOMAIN_ID_MASK)
 #define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL)
 #define VTD_INV_DESC_IOTLB_AM(val)      ((val) & 0x3fULL)
-#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000ff00ULL
+#define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000f100ULL
 #define VTD_INV_DESC_IOTLB_RSVD_HI      0xf80ULL
 #define VTD_INV_DESC_IOTLB_PASID_PASID  (2ULL << 4)
 #define VTD_INV_DESC_IOTLB_PASID_PAGE   (3ULL << 4)
@@ -406,7 +407,7 @@  typedef union VTDInvDesc VTDInvDesc;
 #define VTD_INV_DESC_DEVICE_IOTLB_SIZE(val) ((val) & 0x1)
 #define VTD_INV_DESC_DEVICE_IOTLB_SID(val) (((val) >> 32) & 0xFFFFULL)
 #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
-#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0fff8
+#define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
 
 /* Rsvd field masks for spte */
 #define VTD_SPTE_SNP 0x800ULL
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 16d2885fcc..68cb72a481 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2744,7 +2744,7 @@  static bool vtd_process_inv_desc(IntelIOMMUState *s)
         return false;
     }
 
-    desc_type = inv_desc.lo & VTD_INV_DESC_TYPE;
+    desc_type = VTD_INV_DESC_TYPE(inv_desc.lo);
     /* FIXME: should update at first or at last? */
     s->iq_last_desc_type = desc_type;