diff mbox series

[v6,1/5] target/riscv: Add `ext_smrnmi` in the RISCVCPUConfig.

Message ID 20240902071358.1061693-2-tommy.wu@sifive.com (mailing list archive)
State New, archived
Headers show
Series target/riscv: Add Smrnmi support. | expand

Commit Message

Tommy Wu Sept. 2, 2024, 7:13 a.m. UTC 
The boolean variable `ext_smrnmi` is used to determine whether the
Smrnmi extension exists.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Tommy Wu <tommy.wu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu_cfg.h | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index 8b272fb826..ae2a945b5f 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -125,6 +125,7 @@  struct RISCVCPUConfig {
     bool ext_ssaia;
     bool ext_sscofpmf;
     bool ext_smepmp;
+    bool ext_smrnmi;
     bool rvv_ta_all_1s;
     bool rvv_ma_all_1s;