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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20710e11e02sm36539875ad.14.2024.09.09.10.28.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 10:28:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, daniel@0x0f.com Subject: [PATCH v3 07/26] target/m68k: Invoke update_fpsr for FMOVECR Date: Mon, 9 Sep 2024 10:28:04 -0700 Message-ID: <20240909172823.649837-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240909172823.649837-1-richard.henderson@linaro.org> References: <20240909172823.649837-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This instruction sets CC and EXC bits just like any other. So far we do not properly emulate inexact for the various rom entries, but we can certainly update CC correctly. Signed-off-by: Richard Henderson --- target/m68k/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 423c663607..003318163c 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4955,6 +4955,7 @@ DISAS_INSN(fpu) TCGv rom_offset = tcg_constant_i32(opmode); cpu_dest = gen_fp_ptr(REG(ext, 7)); gen_helper_fconst(tcg_env, cpu_dest, rom_offset); + gen_helper_update_fpsr(tcg_env, cpu_dest); return; } break;