| Message ID | 20240911131900.179648-3-s.makarov@syntacore.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Fixes for standard conformance | expand |
diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 3f3ee96ebc..deec162630 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -354,8 +354,10 @@ static void sifive_plic_irq_request(void *opaque, int irq, int level) { SiFivePLICState *s = opaque; - sifive_plic_set_pending(s, irq, level > 0); - sifive_plic_update(s); + if (level > 0) { + sifive_plic_set_pending(s, irq, true); + sifive_plic_update(s); + } } static void sifive_plic_realize(DeviceState *dev, Error **errp)
According to PLIC specification (chapter 5), there is only one case, when interrupt is claimed. Fix PLIC controller to match this behavior. Signed-off-by: Sergey Makarov <s.makarov@syntacore.com> --- hw/intc/sifive_plic.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)