@@ -1030,7 +1030,7 @@ static void erst_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_REDHAT_ACPI_ERST;
k->revision = 0x00;
k->class_id = PCI_CLASS_OTHERS;
- dc->reset = erst_reset;
+ device_class_set_legacy_reset(dc, erst_reset);
dc->vmsd = &erst_vmstate;
dc->user_creatable = true;
dc->hotpluggable = false;
@@ -633,7 +633,7 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
k->revision = 0x03;
k->class_id = PCI_CLASS_BRIDGE_OTHER;
- dc->reset = piix4_pm_reset;
+ device_class_set_legacy_reset(dc, piix4_pm_reset);
dc->desc = "PM";
dc->vmsd = &vmstate_acpi;
device_class_set_props(dc, piix4_pm_properties);
@@ -297,7 +297,7 @@ static void aspeed_adc_engine_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_adc_engine_realize;
- dc->reset = aspeed_adc_engine_reset;
+ device_class_set_legacy_reset(dc, aspeed_adc_engine_reset);
device_class_set_props(dc, aspeed_adc_engine_properties);
dc->desc = "Aspeed Analog-to-Digital Engine";
dc->vmsd = &vmstate_aspeed_adc_engine;
@@ -183,7 +183,7 @@ static void max111x_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
k->transfer = max111x_transfer;
- dc->reset = max111x_reset;
+ device_class_set_legacy_reset(dc, max111x_reset);
dc->vmsd = &vmstate_max111x;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -288,7 +288,7 @@ static void stm32f2xx_adc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f2xx_adc_reset;
+ device_class_set_legacy_reset(dc, stm32f2xx_adc_reset);
dc->vmsd = &vmstate_stm32f2xx_adc;
}
@@ -286,7 +286,7 @@ static void zynq_xadc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_zynq_xadc;
- dc->reset = zynq_xadc_reset;
+ device_class_set_legacy_reset(dc, zynq_xadc_reset);
}
static const TypeInfo zynq_xadc_info = {
@@ -1700,7 +1700,7 @@ static void armsse_class_init(ObjectClass *klass, void *data)
dc->realize = armsse_realize;
dc->vmsd = &armsse_vmstate;
device_class_set_props(dc, info->props);
- dc->reset = armsse_reset;
+ device_class_set_legacy_reset(dc, armsse_reset);
iic->check = armsse_idau_check;
asc->info = info;
}
@@ -145,7 +145,7 @@ static void highbank_regs_class_init(ObjectClass *klass, void *data)
dc->desc = "Calxeda Highbank registers";
dc->vmsd = &vmstate_highbank_regs;
- dc->reset = highbank_regs_reset;
+ device_class_set_legacy_reset(dc, highbank_regs_reset);
}
static const TypeInfo highbank_regs_info = {
@@ -411,7 +411,7 @@ static void mv88w8618_pic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = mv88w8618_pic_reset;
+ device_class_set_legacy_reset(dc, mv88w8618_pic_reset);
dc->vmsd = &mv88w8618_pic_vmsd;
}
@@ -605,7 +605,7 @@ static void mv88w8618_pit_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = mv88w8618_pit_reset;
+ device_class_set_legacy_reset(dc, mv88w8618_pit_reset);
dc->vmsd = &mv88w8618_pit_vmsd;
}
@@ -1030,7 +1030,7 @@ static void musicpal_gpio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = musicpal_gpio_reset;
+ device_class_set_legacy_reset(dc, musicpal_gpio_reset);
dc->vmsd = &musicpal_gpio_vmsd;
}
@@ -2051,7 +2051,7 @@ static void pxa2xx_fir_class_init(ObjectClass *klass, void *data)
dc->realize = pxa2xx_fir_realize;
dc->vmsd = &pxa2xx_fir_vmsd;
device_class_set_props(dc, pxa2xx_fir_properties);
- dc->reset = pxa2xx_fir_reset;
+ device_class_set_legacy_reset(dc, pxa2xx_fir_reset);
}
static const TypeInfo pxa2xx_fir_info = {
@@ -2369,7 +2369,7 @@ static void pxa2xx_ssp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pxa2xx_ssp_reset;
+ device_class_set_legacy_reset(dc, pxa2xx_ssp_reset);
dc->vmsd = &vmstate_pxa2xx_ssp;
}
@@ -1342,7 +1342,7 @@ static void strongarm_uart_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->desc = "StrongARM UART controller";
- dc->reset = strongarm_uart_reset;
+ device_class_set_legacy_reset(dc, strongarm_uart_reset);
dc->vmsd = &vmstate_strongarm_uart_regs;
device_class_set_props(dc, strongarm_uart_properties);
dc->realize = strongarm_uart_realize;
@@ -1595,7 +1595,7 @@ static void strongarm_ssp_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->desc = "StrongARM SSP controller";
- dc->reset = strongarm_ssp_reset;
+ device_class_set_legacy_reset(dc, strongarm_ssp_reset);
dc->vmsd = &vmstate_strongarm_ssp_regs;
}
@@ -1344,7 +1344,7 @@ static void ac97_class_init(ObjectClass *klass, void *data)
dc->desc = "Intel 82801AA AC97 Audio";
dc->vmsd = &vmstate_ac97;
device_class_set_props(dc, ac97_properties);
- dc->reset = ac97_on_reset;
+ device_class_set_legacy_reset(dc, ac97_on_reset);
}
static const TypeInfo ac97_info = {
@@ -164,7 +164,7 @@ static void cs4231_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = cs_reset;
+ device_class_set_legacy_reset(dc, cs_reset);
dc->vmsd = &vmstate_cs4231;
}
@@ -702,7 +702,7 @@ static void cs4231a_class_initfn (ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS (klass);
dc->realize = cs4231a_realizefn;
- dc->reset = cs4231a_reset;
+ device_class_set_legacy_reset(dc, cs4231a_reset);
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "Crystal Semiconductor CS4231A";
dc->vmsd = &vmstate_cs4231a;
@@ -888,7 +888,7 @@ static void es1370_class_init (ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "ENSONIQ AudioPCI ES1370";
dc->vmsd = &vmstate_es1370;
- dc->reset = es1370_on_reset;
+ device_class_set_legacy_reset(dc, es1370_on_reset);
device_class_set_props(dc, es1370_properties);
}
@@ -910,7 +910,7 @@ static void hda_audio_base_class_init(ObjectClass *klass, void *data)
k->command = hda_audio_command;
k->stream = hda_audio_stream;
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
- dc->reset = hda_audio_reset;
+ device_class_set_legacy_reset(dc, hda_audio_reset);
dc->vmsd = &vmstate_hda_audio;
device_class_set_props(dc, hda_audio_properties);
}
@@ -1231,7 +1231,7 @@ static void intel_hda_class_init(ObjectClass *klass, void *data)
k->exit = intel_hda_exit;
k->vendor_id = PCI_VENDOR_ID_INTEL;
k->class_id = PCI_CLASS_MULTIMEDIA_HD_AUDIO;
- dc->reset = intel_hda_reset;
+ device_class_set_legacy_reset(dc, intel_hda_reset);
dc->vmsd = &vmstate_intel_hda;
device_class_set_props(dc, intel_hda_properties);
}
@@ -292,7 +292,7 @@ static void mv88w8618_audio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mv88w8618_audio_realize;
- dc->reset = mv88w8618_audio_reset;
+ device_class_set_legacy_reset(dc, mv88w8618_audio_reset);
dc->vmsd = &mv88w8618_audio_vmsd;
dc->user_creatable = false;
}
@@ -639,7 +639,7 @@ static void pl041_device_class_init(ObjectClass *klass, void *data)
dc->realize = pl041_realize;
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
- dc->reset = pl041_device_reset;
+ device_class_set_legacy_reset(dc, pl041_device_reset);
dc->vmsd = &vmstate_pl041;
device_class_set_props(dc, pl041_device_properties);
}
@@ -478,7 +478,7 @@ static void via_ac97_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, via_ac97_properties);
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "VIA AC97";
- dc->reset = via_ac97_reset;
+ device_class_set_legacy_reset(dc, via_ac97_reset);
/* Reason: Part of a south bridge chip */
dc->user_creatable = false;
}
@@ -307,7 +307,7 @@ static void isabus_fdc_class_init(ObjectClass *klass, void *data)
dc->desc = "virtual floppy controller";
dc->realize = isabus_fdc_realize;
dc->fw_name = "fdc";
- dc->reset = fdctrl_external_reset_isa;
+ device_class_set_legacy_reset(dc, fdctrl_external_reset_isa);
dc->vmsd = &vmstate_isa_fdc;
adevc->build_dev_aml = build_fdc_aml;
device_class_set_props(dc, isa_fdc_properties);
@@ -181,7 +181,7 @@ static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = sysbus_fdc_realize;
- dc->reset = fdctrl_external_reset_sysbus;
+ device_class_set_legacy_reset(dc, fdctrl_external_reset_sysbus);
dc->vmsd = &vmstate_sysbus_fdc;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -1824,7 +1824,7 @@ static void m25p80_class_init(ObjectClass *klass, void *data)
k->cs_polarity = SSI_CS_LOW;
dc->vmsd = &vmstate_m25p80;
device_class_set_props(dc, m25p80_properties);
- dc->reset = m25p80_reset;
+ device_class_set_legacy_reset(dc, m25p80_reset);
mc->pi = data;
}
@@ -457,7 +457,7 @@ static void nand_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = nand_realize;
- dc->reset = nand_reset;
+ device_class_set_legacy_reset(dc, nand_reset);
dc->vmsd = &vmstate_nand;
device_class_set_props(dc, nand_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -846,7 +846,7 @@ static void onenand_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = onenand_realize;
- dc->reset = onenand_system_reset;
+ device_class_set_legacy_reset(dc, onenand_system_reset);
device_class_set_props(dc, onenand_properties);
}
@@ -940,7 +940,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pflash_cfi01_system_reset;
+ device_class_set_legacy_reset(dc, pflash_cfi01_system_reset);
dc->realize = pflash_cfi01_realize;
device_class_set_props(dc, pflash_cfi01_properties);
dc->vmsd = &vmstate_pflash;
@@ -974,7 +974,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pflash_cfi02_realize;
- dc->reset = pflash_cfi02_reset;
+ device_class_set_legacy_reset(dc, pflash_cfi02_reset);
dc->unrealize = pflash_cfi02_unrealize;
device_class_set_props(dc, pflash_cfi02_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -556,7 +556,7 @@ static void sysbus_swim_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = sysbus_swim_realize;
- dc->reset = sysbus_swim_reset;
+ device_class_set_legacy_reset(dc, sysbus_swim_reset);
dc->vmsd = &vmstate_sysbus_swim;
}
@@ -300,7 +300,7 @@ static void avr_usart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = avr_usart_reset;
+ device_class_set_legacy_reset(dc, avr_usart_reset);
device_class_set_props(dc, avr_usart_properties);
dc->realize = avr_usart_realize;
}
@@ -389,7 +389,7 @@ static void cmsdk_apb_uart_class_init(ObjectClass *klass, void *data)
dc->realize = cmsdk_apb_uart_realize;
dc->vmsd = &cmsdk_apb_uart_vmstate;
- dc->reset = cmsdk_apb_uart_reset;
+ device_class_set_legacy_reset(dc, cmsdk_apb_uart_reset);
device_class_set_props(dc, cmsdk_apb_uart_properties);
}
@@ -182,7 +182,7 @@ static void digic_uart_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = digic_uart_realize;
- dc->reset = digic_uart_reset;
+ device_class_set_legacy_reset(dc, digic_uart_reset);
dc->vmsd = &vmstate_digic_uart;
device_class_set_props(dc, digic_uart_properties);
}
@@ -1062,7 +1062,7 @@ static void escc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = escc_reset;
+ device_class_set_legacy_reset(dc, escc_reset);
dc->realize = escc_realize;
dc->vmsd = &vmstate_escc;
device_class_set_props(dc, escc_properties);
@@ -246,7 +246,7 @@ static void etraxfs_ser_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = etraxfs_ser_reset;
+ device_class_set_legacy_reset(dc, etraxfs_ser_reset);
device_class_set_props(dc, etraxfs_ser_properties);
dc->realize = etraxfs_ser_realize;
}
@@ -717,7 +717,7 @@ static void exynos4210_uart_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = exynos4210_uart_realize;
- dc->reset = exynos4210_uart_reset;
+ device_class_set_legacy_reset(dc, exynos4210_uart_reset);
device_class_set_props(dc, exynos4210_uart_properties);
dc->vmsd = &vmstate_exynos4210_uart;
}
@@ -262,7 +262,7 @@ static void goldfish_tty_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
device_class_set_props(dc, goldfish_tty_properties);
- dc->reset = goldfish_tty_reset;
+ device_class_set_legacy_reset(dc, goldfish_tty_reset);
dc->realize = goldfish_tty_realize;
dc->unrealize = goldfish_tty_unrealize;
dc->vmsd = &vmstate_goldfish_tty;
@@ -287,7 +287,7 @@ static void grlib_apbuart_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = grlib_apbuart_realize;
- dc->reset = grlib_apbuart_reset;
+ device_class_set_legacy_reset(dc, grlib_apbuart_reset);
device_class_set_props(dc, grlib_apbuart_properties);
}
@@ -547,7 +547,7 @@ static void ibex_uart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = ibex_uart_reset;
+ device_class_set_legacy_reset(dc, ibex_uart_reset);
dc->realize = ibex_uart_realize;
dc->vmsd = &vmstate_ibex_uart;
device_class_set_props(dc, ibex_uart_properties);
@@ -449,7 +449,7 @@ static void imx_serial_class_init(ObjectClass *klass, void *data)
dc->realize = imx_serial_realize;
dc->vmsd = &vmstate_imx_serial;
- dc->reset = imx_serial_reset_at_boot;
+ device_class_set_legacy_reset(dc, imx_serial_reset_at_boot);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->desc = "i.MX series UART";
device_class_set_props(dc, imx_serial_properties);
@@ -322,7 +322,7 @@ static void mcf_uart_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = mcf_uart_realize;
- dc->reset = mcf_uart_reset;
+ device_class_set_legacy_reset(dc, mcf_uart_reset);
device_class_set_props(dc, mcf_uart_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}
@@ -126,7 +126,7 @@ static void mchp_pfsoc_mmuart_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = mchp_pfsoc_mmuart_realize;
- dc->reset = mchp_pfsoc_mmuart_reset;
+ device_class_set_legacy_reset(dc, mchp_pfsoc_mmuart_reset);
dc->vmsd = &mchp_pfsoc_mmuart_vmstate;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}
@@ -313,7 +313,7 @@ static void nrf51_uart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = nrf51_uart_reset;
+ device_class_set_legacy_reset(dc, nrf51_uart_reset);
dc->realize = nrf51_uart_realize;
device_class_set_props(dc, nrf51_uart_properties);
dc->vmsd = &nrf51_uart_vmstate;
@@ -629,7 +629,7 @@ static void pl011_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = pl011_realize;
- dc->reset = pl011_reset;
+ device_class_set_legacy_reset(dc, pl011_reset);
dc->vmsd = &vmstate_pl011;
device_class_set_props(dc, pl011_properties);
}
@@ -331,7 +331,7 @@ static void rsci_class_init(ObjectClass *klass, void *data)
dc->realize = rsci_realize;
dc->vmsd = &vmstate_rsci;
- dc->reset = rsci_reset;
+ device_class_set_legacy_reset(dc, rsci_reset);
device_class_set_props(dc, rsci_properties);
}
@@ -346,7 +346,7 @@ static void console_class_init(ObjectClass *klass, void *data)
SCLPEventClass *ec = SCLP_EVENT_CLASS(klass);
device_class_set_props(dc, console_properties);
- dc->reset = console_reset;
+ device_class_set_legacy_reset(dc, console_reset);
dc->vmsd = &vmstate_sclplmconsole;
ec->init = console_init;
ec->get_send_mask = send_mask;
@@ -262,7 +262,7 @@ static void console_class_init(ObjectClass *klass, void *data)
SCLPEventClass *ec = SCLP_EVENT_CLASS(klass);
device_class_set_props(dc, console_properties);
- dc->reset = console_reset;
+ device_class_set_legacy_reset(dc, console_reset);
dc->vmsd = &vmstate_sclpconsole;
ec->init = console_init;
ec->get_send_mask = send_mask;
@@ -459,7 +459,7 @@ static void sh_serial_class_init(ObjectClass *oc, void *data)
device_class_set_props(dc, sh_serial_properties);
dc->realize = sh_serial_realize;
- dc->reset = sh_serial_reset;
+ device_class_set_legacy_reset(dc, sh_serial_reset);
/* Reason: part of SuperH CPU/SoC, needs to be wired up */
dc->user_creatable = false;
}
@@ -165,7 +165,7 @@ static Property shakti_uart_properties[] = {
static void shakti_uart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = shakti_uart_reset;
+ device_class_set_legacy_reset(dc, shakti_uart_reset);
dc->realize = shakti_uart_realize;
device_class_set_props(dc, shakti_uart_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
@@ -228,7 +228,7 @@ static void stm32f2xx_usart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f2xx_usart_reset;
+ device_class_set_legacy_reset(dc, stm32f2xx_usart_reset);
device_class_set_props(dc, stm32f2xx_usart_properties);
dc->realize = stm32f2xx_usart_realize;
}
@@ -234,7 +234,7 @@ static void xilinx_uartlite_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xilinx_uartlite_reset;
+ device_class_set_legacy_reset(dc, xilinx_uartlite_reset);
dc->realize = xilinx_uartlite_realize;
device_class_set_props(dc, xilinx_uartlite_properties);
}
@@ -124,7 +124,7 @@ static void or_irq_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = or_irq_reset;
+ device_class_set_legacy_reset(dc, or_irq_reset);
device_class_set_props(dc, or_irq_properties);
dc->realize = or_irq_realize;
dc->vmsd = &vmstate_or_irq;
@@ -831,7 +831,7 @@ static void device_class_init(ObjectClass *class, void *data)
* will be registered as the parent reset method and effectively call
* parent reset phases.
*/
- dc->reset = device_phases_reset;
+ device_class_set_legacy_reset(dc, device_phases_reset);
rc->get_transitional_function = device_get_transitional_reset;
object_class_property_add_bool(class, "realized",
@@ -89,7 +89,7 @@ static void cswmbcci_class_init(ObjectClass *oc, void *data)
pc->device_id = 0xa123;
pc->revision = 0;
dc->desc = "CXL Switch Mailbox CCI";
- dc->reset = cswmbcci_reset;
+ device_class_set_legacy_reset(dc, cswmbcci_reset);
device_class_set_props(dc, cxl_switch_cci_props);
}
@@ -1491,7 +1491,7 @@ static void artist_class_init(ObjectClass *klass, void *data)
dc->realize = artist_realizefn;
dc->vmsd = &vmstate_artist;
- dc->reset = artist_reset;
+ device_class_set_legacy_reset(dc, artist_reset);
device_class_set_props(dc, artist_properties);
}
@@ -1055,7 +1055,7 @@ static void ati_vga_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->reset = ati_vga_reset;
+ device_class_set_legacy_reset(dc, ati_vga_reset);
device_class_set_props(dc, ati_vga_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
@@ -449,7 +449,7 @@ static void bcm2835_fb_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, bcm2835_fb_props);
dc->realize = bcm2835_fb_realize;
- dc->reset = bcm2835_fb_reset;
+ device_class_set_legacy_reset(dc, bcm2835_fb_reset);
dc->vmsd = &vmstate_bcm2835_fb;
}
@@ -374,7 +374,7 @@ static void cg3_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = cg3_realizefn;
- dc->reset = cg3_reset;
+ device_class_set_legacy_reset(dc, cg3_reset);
dc->vmsd = &vmstate_cg3;
device_class_set_props(dc, cg3_properties);
}
@@ -145,7 +145,7 @@ static void dpcd_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- dc->reset = dpcd_reset;
+ device_class_set_legacy_reset(dc, dpcd_reset);
dc->vmsd = &vmstate_dpcd;
}
@@ -1964,7 +1964,7 @@ static void exynos4210_fimd_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &exynos4210_fimd_vmstate;
- dc->reset = exynos4210_fimd_reset;
+ device_class_set_legacy_reset(dc, exynos4210_fimd_reset);
dc->realize = exynos4210_fimd_realize;
device_class_set_props(dc, exynos4210_fimd_properties);
}
@@ -534,7 +534,7 @@ static void g364fb_sysbus_class_init(ObjectClass *klass, void *data)
dc->realize = g364fb_sysbus_realize;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
dc->desc = "G364 framebuffer";
- dc->reset = g364fb_sysbus_reset;
+ device_class_set_legacy_reset(dc, g364fb_sysbus_reset);
dc->vmsd = &vmstate_g364fb_sysbus;
device_class_set_props(dc, g364fb_sysbus_properties);
}
@@ -105,7 +105,7 @@ static void i2c_ddc_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc);
- dc->reset = i2c_ddc_reset;
+ device_class_set_legacy_reset(dc, i2c_ddc_reset);
dc->vmsd = &vmstate_i2c_ddc;
device_class_set_props(dc, i2c_ddc_properties);
isc->event = i2c_ddc_event;
@@ -300,7 +300,7 @@ static void jazz_led_class_init(ObjectClass *klass, void *data)
dc->desc = "Jazz LED display",
dc->vmsd = &vmstate_jazz_led;
- dc->reset = jazz_led_reset;
+ device_class_set_legacy_reset(dc, jazz_led_reset);
dc->realize = jazz_led_realize;
}
@@ -802,7 +802,7 @@ static void macfb_sysbus_class_init(ObjectClass *klass, void *data)
dc->realize = macfb_sysbus_realize;
dc->desc = "SysBus Macintosh framebuffer";
- dc->reset = macfb_sysbus_reset;
+ device_class_set_legacy_reset(dc, macfb_sysbus_reset);
dc->vmsd = &vmstate_macfb_sysbus;
device_class_set_props(dc, macfb_sysbus_properties);
}
@@ -817,7 +817,7 @@ static void macfb_nubus_class_init(ObjectClass *klass, void *data)
device_class_set_parent_unrealize(dc, macfb_nubus_unrealize,
&ndc->parent_unrealize);
dc->desc = "Nubus Macintosh framebuffer";
- dc->reset = macfb_nubus_reset;
+ device_class_set_legacy_reset(dc, macfb_nubus_reset);
dc->vmsd = &vmstate_macfb_nubus;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
device_class_set_props(dc, macfb_nubus_properties);
@@ -2486,7 +2486,7 @@ static void qxl_pci_class_init(ObjectClass *klass, void *data)
k->vendor_id = REDHAT_PCI_VENDOR_ID;
k->device_id = QXL_DEVICE_ID_STABLE;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
- dc->reset = qxl_reset_handler;
+ device_class_set_legacy_reset(dc, qxl_reset_handler);
dc->vmsd = &qxl_vmstate;
device_class_set_props(dc, qxl_properties);
}
@@ -175,7 +175,7 @@ static void sii9022_class_init(ObjectClass *klass, void *data)
k->event = sii9022_event;
k->recv = sii9022_rx;
k->send = sii9022_tx;
- dc->reset = sii9022_reset;
+ device_class_set_legacy_reset(dc, sii9022_reset);
dc->realize = sii9022_realize;
dc->vmsd = &vmstate_sii9022;
}
@@ -2086,7 +2086,7 @@ static void sm501_sysbus_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
dc->desc = "SM501 Multimedia Companion";
device_class_set_props(dc, sm501_sysbus_properties);
- dc->reset = sm501_reset_sysbus;
+ device_class_set_legacy_reset(dc, sm501_reset_sysbus);
dc->vmsd = &vmstate_sm501_sysbus;
}
@@ -2181,7 +2181,7 @@ static void sm501_pci_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
dc->desc = "SM501 Display Controller";
device_class_set_props(dc, sm501_pci_properties);
- dc->reset = sm501_reset_pci;
+ device_class_set_legacy_reset(dc, sm501_reset_pci);
dc->hotpluggable = false;
dc->vmsd = &vmstate_sm501_pci;
}
@@ -892,7 +892,7 @@ static void tcx_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = tcx_realizefn;
- dc->reset = tcx_reset;
+ device_class_set_legacy_reset(dc, tcx_reset);
dc->vmsd = &vmstate_tcx;
device_class_set_props(dc, tcx_properties);
}
@@ -98,7 +98,7 @@ static void vga_isa_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = vga_isa_realizefn;
- dc->reset = vga_isa_reset;
+ device_class_set_legacy_reset(dc, vga_isa_reset);
dc->vmsd = &vmstate_vga_common;
device_class_set_props(dc, vga_isa_properties);
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
@@ -122,7 +122,7 @@ static void vga_mmio_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = vga_mmio_realizefn;
- dc->reset = vga_mmio_reset;
+ device_class_set_legacy_reset(dc, vga_mmio_reset);
dc->vmsd = &vmstate_vga_common;
device_class_set_props(dc, vga_mmio_properties);
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
@@ -403,7 +403,7 @@ static void secondary_class_init(ObjectClass *klass, void *data)
k->exit = pci_secondary_vga_exit;
k->class_id = PCI_CLASS_DISPLAY_OTHER;
device_class_set_props(dc, secondary_pci_properties);
- dc->reset = pci_secondary_vga_reset;
+ device_class_set_legacy_reset(dc, pci_secondary_vga_reset);
}
static const TypeInfo vga_info = {
@@ -1352,7 +1352,7 @@ static void vmsvga_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_DISPLAY_VGA;
k->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
k->subsystem_id = SVGA_PCI_DEVICE_ID;
- dc->reset = vmsvga_reset;
+ device_class_set_legacy_reset(dc, vmsvga_reset);
dc->vmsd = &vmstate_vmware_vga;
device_class_set_props(dc, vga_vmware_properties);
dc->hotpluggable = false;
@@ -1398,7 +1398,7 @@ static void xlnx_dp_class_init(ObjectClass *oc, void *data)
dc->realize = xlnx_dp_realize;
dc->vmsd = &vmstate_dp;
- dc->reset = xlnx_dp_reset;
+ device_class_set_legacy_reset(dc, xlnx_dp_reset);
device_class_set_props(dc, xlnx_dp_device_properties);
}
@@ -390,7 +390,7 @@ static void bcm2835_dma_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = bcm2835_dma_realize;
- dc->reset = bcm2835_dma_reset;
+ device_class_set_legacy_reset(dc, bcm2835_dma_reset);
dc->vmsd = &vmstate_bcm2835_dma;
}
@@ -599,7 +599,7 @@ static void i8257_class_init(ObjectClass *klass, void *data)
IsaDmaClass *idc = ISADMA_CLASS(klass);
dc->realize = i8257_realize;
- dc->reset = i8257_reset;
+ device_class_set_legacy_reset(dc, i8257_reset);
dc->vmsd = &vmstate_i8257;
device_class_set_props(dc, i8257_properties);
@@ -421,7 +421,7 @@ static void pl080_class_init(ObjectClass *oc, void *data)
dc->vmsd = &vmstate_pl080;
dc->realize = pl080_realize;
device_class_set_props(dc, pl080_properties);
- dc->reset = pl080_reset;
+ device_class_set_legacy_reset(dc, pl080_reset);
}
static const TypeInfo pl080_info = {
@@ -1678,7 +1678,7 @@ static void pl330_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pl330_realize;
- dc->reset = pl330_reset;
+ device_class_set_legacy_reset(dc, pl330_reset);
device_class_set_props(dc, pl330_properties);
dc->vmsd = &vmstate_pl330;
}
@@ -707,7 +707,7 @@ static void rc4030_class_init(ObjectClass *klass, void *class_data)
dc->realize = rc4030_realize;
dc->unrealize = rc4030_unrealize;
- dc->reset = rc4030_reset;
+ device_class_set_legacy_reset(dc, rc4030_reset);
dc->vmsd = &vmstate_rc4030;
}
@@ -278,7 +278,7 @@ static void sparc32_dma_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = sparc32_dma_device_reset;
+ device_class_set_legacy_reset(dc, sparc32_dma_device_reset);
dc->vmsd = &vmstate_sparc32_dma_device;
}
@@ -627,7 +627,7 @@ static void axidma_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = xilinx_axidma_realize;
- dc->reset = xilinx_axidma_reset;
+ device_class_set_legacy_reset(dc, xilinx_axidma_reset);
device_class_set_props(dc, axidma_properties);
}
@@ -821,7 +821,7 @@ static void zdma_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = zdma_reset;
+ device_class_set_legacy_reset(dc, zdma_reset);
dc->realize = zdma_realize;
device_class_set_props(dc, zdma_props);
dc->vmsd = &vmstate_zdma;
@@ -384,7 +384,7 @@ static void xlnx_zynq_devcfg_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xlnx_zynq_devcfg_reset;
+ device_class_set_legacy_reset(dc, xlnx_zynq_devcfg_reset);
dc->vmsd = &vmstate_xlnx_zynq_devcfg;
}
@@ -719,7 +719,7 @@ static void xlnx_csu_dma_class_init(ObjectClass *klass, void *data)
StreamSinkClass *ssc = STREAM_SINK_CLASS(klass);
XlnxCSUDMAClass *xcdc = XLNX_CSU_DMA_CLASS(klass);
- dc->reset = xlnx_csu_dma_reset;
+ device_class_set_legacy_reset(dc, xlnx_csu_dma_reset);
dc->realize = xlnx_csu_dma_realize;
dc->vmsd = &vmstate_xlnx_csu_dma;
device_class_set_props(dc, xlnx_csu_dma_properties);
@@ -598,7 +598,7 @@ static void xlnx_dpdma_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->vmsd = &vmstate_xlnx_dpdma;
- dc->reset = xlnx_dpdma_reset;
+ device_class_set_legacy_reset(dc, xlnx_dpdma_reset);
}
static const TypeInfo xlnx_dpdma_info = {
@@ -326,7 +326,7 @@ static void fsi_aspeed_apb2opb_class_init(ObjectClass *klass, void *data)
dc->desc = "ASPEED APB2OPB Bridge";
dc->realize = fsi_aspeed_apb2opb_realize;
- dc->reset = fsi_aspeed_apb2opb_reset;
+ device_class_set_legacy_reset(dc, fsi_aspeed_apb2opb_reset);
}
static const TypeInfo aspeed_apb2opb_info = {
@@ -151,7 +151,7 @@ static void fsi_master_class_init(ObjectClass *klass, void *data)
dc->bus_type = TYPE_OP_BUS;
dc->desc = "FSI Master";
dc->realize = fsi_master_realize;
- dc->reset = fsi_master_reset;
+ device_class_set_legacy_reset(dc, fsi_master_reset);
}
static const TypeInfo fsi_master_info = {
@@ -82,7 +82,7 @@ static void fsi_slave_class_init(ObjectClass *klass, void *data)
dc->bus_type = TYPE_FSI_BUS;
dc->desc = "FSI Slave";
- dc->reset = fsi_slave_reset;
+ device_class_set_legacy_reset(dc, fsi_slave_reset);
}
static const TypeInfo fsi_slave_info = {
@@ -97,7 +97,7 @@ static void fsi_scratchpad_class_init(ObjectClass *klass, void *data)
dc->bus_type = TYPE_FSI_LBUS;
dc->realize = fsi_scratchpad_realize;
- dc->reset = fsi_scratchpad_reset;
+ device_class_set_legacy_reset(dc, fsi_scratchpad_reset);
}
static const TypeInfo fsi_scratchpad_info = {
@@ -1116,7 +1116,7 @@ static void aspeed_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_gpio_realize;
- dc->reset = aspeed_gpio_reset;
+ device_class_set_legacy_reset(dc, aspeed_gpio_reset);
dc->desc = "Aspeed GPIO Controller";
dc->vmsd = &vmstate_aspeed_gpio;
}
@@ -325,7 +325,7 @@ static void bcm2835_gpio_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_bcm2835_gpio;
dc->realize = &bcm2835_gpio_realize;
- dc->reset = &bcm2835_gpio_reset;
+ device_class_set_legacy_reset(dc, bcm2835_gpio_reset);
}
static const TypeInfo bcm2835_gpio_info = {
@@ -371,7 +371,7 @@ static void bcm2838_gpio_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_bcm2838_gpio;
dc->realize = &bcm2838_gpio_realize;
- dc->reset = &bcm2838_gpio_reset;
+ device_class_set_legacy_reset(dc, bcm2838_gpio_reset);
}
static const TypeInfo bcm2838_gpio_info = {
@@ -91,7 +91,7 @@ static void gpio_key_class_init(ObjectClass *klass, void *data)
dc->realize = gpio_key_realize;
dc->vmsd = &vmstate_gpio_key;
- dc->reset = &gpio_key_reset;
+ device_class_set_legacy_reset(dc, gpio_key_reset);
}
static const TypeInfo gpio_key_info = {
@@ -333,7 +333,7 @@ static void imx_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_gpio_realize;
- dc->reset = imx_gpio_reset;
+ device_class_set_legacy_reset(dc, imx_gpio_reset);
device_class_set_props(dc, imx_gpio_properties);
dc->vmsd = &vmstate_imx_gpio;
dc->desc = "i.MX GPIO controller";
@@ -198,7 +198,7 @@ static void max7310_class_init(ObjectClass *klass, void *data)
k->event = max7310_event;
k->recv = max7310_rx;
k->send = max7310_tx;
- dc->reset = max7310_reset;
+ device_class_set_legacy_reset(dc, max7310_reset);
dc->vmsd = &vmstate_max7310;
}
@@ -205,7 +205,7 @@ static void mpc8xxx_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_mpc8xxx_gpio;
- dc->reset = mpc8xxx_gpio_reset;
+ device_class_set_legacy_reset(dc, mpc8xxx_gpio_reset);
}
static const TypeInfo mpc8xxx_gpio_info = {
@@ -310,7 +310,7 @@ static void nrf51_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_nrf51_gpio;
- dc->reset = nrf51_gpio_reset;
+ device_class_set_legacy_reset(dc, nrf51_gpio_reset);
dc->desc = "nRF51 GPIO";
}
@@ -757,7 +757,7 @@ static void omap_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = omap_gpio_realize;
- dc->reset = omap_gpif_reset;
+ device_class_set_legacy_reset(dc, omap_gpif_reset);
device_class_set_props(dc, omap_gpio_properties);
/* Reason: pointer property "clk" */
dc->user_creatable = false;
@@ -792,7 +792,7 @@ static void omap2_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = omap2_gpio_realize;
- dc->reset = omap2_gpif_reset;
+ device_class_set_legacy_reset(dc, omap2_gpif_reset);
device_class_set_props(dc, omap2_gpio_properties);
/* Reason: pointer properties "iclk", "fclk0", ..., "fclk5" */
dc->user_creatable = false;
@@ -460,7 +460,7 @@ static void pca9552_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
PCA955xClass *pc = PCA955X_CLASS(oc);
- dc->reset = pca9552_reset;
+ device_class_set_legacy_reset(dc, pca9552_reset);
dc->vmsd = &pca9552_vmstate;
pc->max_reg = PCA9552_LS3;
pc->pin_count = 16;
@@ -305,7 +305,7 @@ static void pca9554_class_init(ObjectClass *klass, void *data)
k->recv = pca9554_recv;
k->send = pca9554_send;
dc->realize = pca9554_realize;
- dc->reset = pca9554_reset;
+ device_class_set_legacy_reset(dc, pca9554_reset);
dc->vmsd = &pca9554_vmstate;
device_class_set_props(dc, pca9554_properties);
}
@@ -146,7 +146,7 @@ static void pcf8574_class_init(ObjectClass *klass, void *data)
k->recv = pcf8574_rx;
k->send = pcf8574_tx;
dc->realize = pcf8574_realize;
- dc->reset = pcf8574_reset;
+ device_class_set_legacy_reset(dc, pcf8574_reset);
dc->vmsd = &vmstate_pcf8574;
}
@@ -378,7 +378,7 @@ static void sifive_gpio_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, sifive_gpio_properties);
dc->vmsd = &vmstate_sifive_gpio;
dc->realize = sifive_gpio_realize;
- dc->reset = sifive_gpio_reset;
+ device_class_set_legacy_reset(dc, sifive_gpio_reset);
dc->desc = "SiFive GPIO";
}
@@ -138,7 +138,7 @@ static void synic_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = synic_realize;
- dc->reset = synic_reset;
+ device_class_set_legacy_reset(dc, synic_reset);
dc->user_creatable = false;
}
@@ -2362,7 +2362,7 @@ static void vmbus_dev_class_init(ObjectClass *klass, void *data)
kdev->bus_type = TYPE_VMBUS;
kdev->realize = vmbus_dev_realize;
kdev->unrealize = vmbus_dev_unrealize;
- kdev->reset = vmbus_dev_reset;
+ device_class_set_legacy_reset(kdev, vmbus_dev_reset);
}
static void vmbus_dev_instance_init(Object *obj)
@@ -1065,7 +1065,7 @@ static void aspeed_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &aspeed_i2c_vmstate;
- dc->reset = aspeed_i2c_reset;
+ device_class_set_legacy_reset(dc, aspeed_i2c_reset);
device_class_set_props(dc, aspeed_i2c_properties);
dc->realize = aspeed_i2c_realize;
dc->desc = "Aspeed I2C Controller";
@@ -1249,7 +1249,7 @@ static void aspeed_i2c_bus_class_init(ObjectClass *klass, void *data)
dc->desc = "Aspeed I2C Bus";
dc->realize = aspeed_i2c_bus_realize;
- dc->reset = aspeed_i2c_bus_reset;
+ device_class_set_legacy_reset(dc, aspeed_i2c_bus_reset);
device_class_set_props(dc, aspeed_i2c_bus_properties);
}
@@ -262,7 +262,7 @@ static void bcm2835_i2c_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_i2c_reset;
+ device_class_set_legacy_reset(dc, bcm2835_i2c_reset);
dc->realize = bcm2835_i2c_realize;
dc->vmsd = &vmstate_bcm2835_i2c;
}
@@ -314,7 +314,7 @@ static void exynos4210_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &exynos4210_i2c_vmstate;
- dc->reset = exynos4210_i2c_reset;
+ device_class_set_legacy_reset(dc, exynos4210_i2c_reset);
}
static const TypeInfo exynos4210_i2c_type_info = {
@@ -313,7 +313,7 @@ static void imx_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &imx_i2c_vmstate;
- dc->reset = imx_i2c_reset;
+ device_class_set_legacy_reset(dc, imx_i2c_reset);
dc->realize = imx_i2c_realize;
dc->desc = "i.MX I2C Controller";
}
@@ -110,7 +110,7 @@ static void microbit_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = µbit_i2c_vmstate;
- dc->reset = microbit_i2c_reset;
+ device_class_set_legacy_reset(dc, microbit_i2c_reset);
dc->realize = microbit_i2c_realize;
dc->desc = "Microbit I2C controller";
}
@@ -339,7 +339,7 @@ static void mpc_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &mpc_i2c_vmstate ;
- dc->reset = mpc_i2c_reset;
+ device_class_set_legacy_reset(dc, mpc_i2c_reset);
dc->realize = mpc_i2c_realize;
dc->desc = "MPC I2C Controller";
}
@@ -521,7 +521,7 @@ static void omap_i2c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_props(dc, omap_i2c_properties);
- dc->reset = omap_i2c_reset;
+ device_class_set_legacy_reset(dc, omap_i2c_reset);
/* Reason: pointer properties "iclk", "fclk" */
dc->user_creatable = false;
dc->realize = omap_i2c_realize;
@@ -358,7 +358,7 @@ static void ppc4xx_i2c_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = ppc4xx_i2c_reset;
+ device_class_set_legacy_reset(dc, ppc4xx_i2c_reset);
}
static const TypeInfo ppc4xx_i2c_type_info = {
@@ -143,7 +143,7 @@ static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data)
SMBusDeviceClass *sc = SMBUS_DEVICE_CLASS(klass);
dc->realize = smbus_eeprom_realize;
- dc->reset = smbus_eeprom_reset;
+ device_class_set_legacy_reset(dc, smbus_eeprom_reset);
sc->receive_byte = eeprom_receive_byte;
sc->write_data = eeprom_write_data;
dc->vmsd = &vmstate_smbus_eeprom;
@@ -1628,7 +1628,7 @@ static void amdvi_sysbus_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
X86IOMMUClass *dc_class = X86_IOMMU_DEVICE_CLASS(klass);
- dc->reset = amdvi_sysbus_reset;
+ device_class_set_legacy_reset(dc, amdvi_sysbus_reset);
dc->vmsd = &vmstate_amdvi_sysbus;
dc->hotpluggable = false;
dc_class->realize = amdvi_sysbus_realize;
@@ -4368,7 +4368,7 @@ static void vtd_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
X86IOMMUClass *x86_class = X86_IOMMU_DEVICE_CLASS(klass);
- dc->reset = vtd_reset;
+ device_class_set_legacy_reset(dc, vtd_reset);
dc->vmsd = &vtd_vmstate;
device_class_set_props(dc, vtd_properties);
dc->hotpluggable = false;
@@ -303,7 +303,7 @@ static void kvm_pit_class_init(ObjectClass *klass, void *data)
&kpc->parent_realize);
k->set_channel_gate = kvm_pit_set_gate;
k->get_channel_info = kvm_pit_get_channel_info;
- dc->reset = kvm_pit_reset;
+ device_class_set_legacy_reset(dc, kvm_pit_reset);
device_class_set_props(dc, kvm_pit_properties);
}
@@ -145,7 +145,7 @@ static void kvm_i8259_class_init(ObjectClass *klass, void *data)
PICCommonClass *k = PIC_COMMON_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = kvm_pic_reset;
+ device_class_set_legacy_reset(dc, kvm_pic_reset);
device_class_set_parent_realize(dc, kvm_pic_realize, &kpc->parent_realize);
k->pre_save = kvm_pic_get;
k->post_load = kvm_pic_put;
@@ -146,7 +146,7 @@ static void kvm_ioapic_class_init(ObjectClass *klass, void *data)
k->realize = kvm_ioapic_realize;
k->pre_save = kvm_ioapic_get;
k->post_load = kvm_ioapic_put;
- dc->reset = kvm_ioapic_reset;
+ device_class_set_legacy_reset(dc, kvm_ioapic_reset);
device_class_set_props(dc, kvm_ioapic_properties);
}
@@ -155,7 +155,7 @@ static void xen_overlay_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xen_overlay_reset;
+ device_class_set_legacy_reset(dc, xen_overlay_reset);
dc->realize = xen_overlay_realize;
dc->vmsd = &xen_overlay_vmstate;
}
@@ -102,7 +102,7 @@ static void port92_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = port92_realizefn;
- dc->reset = port92_reset;
+ device_class_set_legacy_reset(dc, port92_reset);
dc->vmsd = &vmstate_port92_isa;
/*
* Reason: unlike ordinary ISA devices, this one needs additional
@@ -850,7 +850,7 @@ static void vapic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = vapic_reset;
+ device_class_set_legacy_reset(dc, vapic_reset);
dc->vmsd = &vmstate_vapic;
dc->realize = vapic_realize;
}
@@ -327,7 +327,7 @@ static void vmmouse_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = vmmouse_realizefn;
- dc->reset = vmmouse_reset;
+ device_class_set_legacy_reset(dc, vmmouse_reset);
dc->vmsd = &vmstate_vmmouse;
device_class_set_props(dc, vmmouse_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
@@ -595,7 +595,7 @@ static void xen_platform_class_init(ObjectClass *klass, void *data)
k->revision = 1;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->desc = "XEN platform pci device";
- dc->reset = platform_reset;
+ device_class_set_legacy_reset(dc, platform_reset);
dc->vmsd = &vmstate_xen_platform;
}
@@ -1878,7 +1878,7 @@ static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
dc->realize = sysbus_ahci_realize;
dc->vmsd = &vmstate_sysbus_ahci;
device_class_set_props(dc, sysbus_ahci_properties);
- dc->reset = sysbus_ahci_reset;
+ device_class_set_legacy_reset(dc, sysbus_ahci_reset);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -323,7 +323,7 @@ static void cmd646_ide_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->reset = cmd646_reset;
+ device_class_set_legacy_reset(dc, cmd646_reset);
dc->vmsd = &vmstate_ide_pci;
k->realize = pci_cmd646_ide_realize;
k->exit = pci_cmd646_ide_exitfn;
@@ -176,7 +176,7 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data)
k->revision = 0x02;
k->class_id = PCI_CLASS_STORAGE_SATA;
dc->vmsd = &vmstate_ich9_ahci;
- dc->reset = pci_ich9_reset;
+ device_class_set_legacy_reset(dc, pci_ich9_reset);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -114,7 +114,7 @@ static void isa_ide_class_initfn(ObjectClass *klass, void *data)
dc->realize = isa_ide_realizefn;
dc->fw_name = "ide";
- dc->reset = isa_ide_reset;
+ device_class_set_legacy_reset(dc, isa_ide_reset);
device_class_set_props(dc, isa_ide_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -476,7 +476,7 @@ static void macio_ide_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = macio_ide_realizefn;
- dc->reset = macio_ide_reset;
+ device_class_set_legacy_reset(dc, macio_ide_reset);
device_class_set_props(dc, macio_ide_properties);
dc->vmsd = &vmstate_pmac;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -622,7 +622,7 @@ static void microdrive_class_init(ObjectClass *oc, void *data)
pcc->io_write = md_common_write;
dc->realize = microdrive_realize;
- dc->reset = md_reset;
+ device_class_set_legacy_reset(dc, md_reset);
dc->vmsd = &vmstate_microdrive;
}
@@ -151,7 +151,7 @@ static void mmio_ide_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = mmio_ide_realizefn;
- dc->reset = mmio_ide_reset;
+ device_class_set_legacy_reset(dc, mmio_ide_reset);
device_class_set_props(dc, mmio_ide_properties);
dc->vmsd = &vmstate_ide_mmio;
}
@@ -183,7 +183,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->reset = piix_ide_reset;
+ device_class_set_legacy_reset(dc, piix_ide_reset);
dc->vmsd = &vmstate_ide_pci;
k->realize = pci_piix_ide_realize;
k->exit = pci_piix_ide_exitfn;
@@ -206,7 +206,7 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->reset = piix_ide_reset;
+ device_class_set_legacy_reset(dc, piix_ide_reset);
dc->vmsd = &vmstate_ide_pci;
k->realize = pci_piix_ide_realize;
k->exit = pci_piix_ide_exitfn;
@@ -300,7 +300,7 @@ static void sii3112_pci_class_init(ObjectClass *klass, void *data)
pd->class_id = PCI_CLASS_STORAGE_RAID;
pd->revision = 1;
pd->realize = sii3112_pci_realize;
- dc->reset = sii3112_reset;
+ device_class_set_legacy_reset(dc, sii3112_reset);
dc->desc = "SiI3112A SATA controller";
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -250,7 +250,7 @@ static void via_ide_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- dc->reset = via_ide_reset;
+ device_class_set_legacy_reset(dc, via_ide_reset);
dc->vmsd = &vmstate_ide_pci;
/* Reason: only works as function of VIA southbridge */
dc->user_creatable = false;
@@ -387,7 +387,7 @@ static void adb_kbd_class_init(ObjectClass *oc, void *data)
adc->devreq = adb_kbd_request;
adc->devhasdata = adb_kbd_has_data;
- dc->reset = adb_kbd_reset;
+ device_class_set_legacy_reset(dc, adb_kbd_reset);
dc->vmsd = &vmstate_adb_kbd;
}
@@ -258,7 +258,7 @@ static void adb_mouse_class_init(ObjectClass *oc, void *data)
adc->devreq = adb_mouse_request;
adc->devhasdata = adb_mouse_has_data;
- dc->reset = adb_mouse_reset;
+ device_class_set_legacy_reset(dc, adb_mouse_reset);
dc->vmsd = &vmstate_adb_mouse;
}
@@ -505,7 +505,7 @@ static void lm8323_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
- dc->reset = lm_kbd_reset;
+ device_class_set_legacy_reset(dc, lm_kbd_reset);
dc->realize = lm8323_realize;
k->event = lm_i2c_event;
k->recv = lm_i2c_rx;
@@ -756,7 +756,7 @@ static void i8042_mmio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = i8042_mmio_realize;
- dc->reset = i8042_mmio_reset;
+ device_class_set_legacy_reset(dc, i8042_mmio_reset);
dc->vmsd = &vmstate_kbd_mmio;
device_class_set_props(dc, i8042_mmio_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
@@ -947,7 +947,7 @@ static void i8042_class_initfn(ObjectClass *klass, void *data)
AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
device_class_set_props(dc, i8042_properties);
- dc->reset = i8042_reset;
+ device_class_set_legacy_reset(dc, i8042_reset);
dc->realize = i8042_realizefn;
dc->vmsd = &vmstate_kbd_isa;
adevc->build_dev_aml = i8042_build_aml;
@@ -191,7 +191,7 @@ static void aw_a10_pic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = aw_a10_pic_reset;
+ device_class_set_legacy_reset(dc, aw_a10_pic_reset);
dc->desc = "allwinner a10 pic";
dc->vmsd = &vmstate_aw_a10_pic;
}
@@ -471,7 +471,7 @@ static void apic_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = apic_reset_common;
+ device_class_set_legacy_reset(dc, apic_reset_common);
device_class_set_props(dc, apic_properties_common);
dc->realize = apic_common_realize;
dc->unrealize = apic_common_unrealize;
@@ -2737,7 +2737,7 @@ static void armv7m_nvic_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_nvic;
device_class_set_props(dc, props_nvic);
- dc->reset = armv7m_nvic_reset;
+ device_class_set_legacy_reset(dc, armv7m_nvic_reset);
dc->realize = armv7m_nvic_realize;
}
@@ -322,7 +322,7 @@ static void aspeed_intc_class_init(ObjectClass *klass, void *data)
dc->desc = "ASPEED INTC Controller";
dc->realize = aspeed_intc_realize;
- dc->reset = aspeed_intc_reset;
+ device_class_set_legacy_reset(dc, aspeed_intc_reset);
dc->vmsd = NULL;
}
@@ -343,7 +343,7 @@ static void aspeed_vic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_vic_realize;
- dc->reset = aspeed_vic_reset;
+ device_class_set_legacy_reset(dc, aspeed_vic_reset);
dc->desc = "ASPEED Interrupt Controller (New)";
dc->vmsd = &vmstate_aspeed_vic;
}
@@ -223,7 +223,7 @@ static void bcm2835_ic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_ic_reset;
+ device_class_set_legacy_reset(dc, bcm2835_ic_reset);
dc->vmsd = &vmstate_bcm2835_ic;
}
@@ -388,7 +388,7 @@ static void bcm2836_control_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2836_control_reset;
+ device_class_set_legacy_reset(dc, bcm2836_control_reset);
dc->vmsd = &vmstate_bcm2836_control;
}
@@ -334,7 +334,7 @@ static void exynos4210_combiner_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_combiner_reset;
+ device_class_set_legacy_reset(dc, exynos4210_combiner_reset);
device_class_set_props(dc, exynos4210_combiner_properties);
dc->vmsd = &vmstate_exynos4210_combiner;
}
@@ -191,7 +191,7 @@ static void goldfish_pic_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc);
- dc->reset = goldfish_pic_reset;
+ device_class_set_legacy_reset(dc, goldfish_pic_reset);
dc->realize = goldfish_pic_realize;
dc->vmsd = &vmstate_goldfish_pic;
ic->get_statistics = goldfish_pic_get_statistics;
@@ -386,7 +386,7 @@ static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = grlib_irqmp_realize;
- dc->reset = grlib_irqmp_reset;
+ device_class_set_legacy_reset(dc, grlib_irqmp_reset);
device_class_set_props(dc, grlib_irqmp_properties);
}
@@ -188,7 +188,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- dc->reset = heathrow_reset;
+ device_class_set_legacy_reset(dc, heathrow_reset);
dc->vmsd = &vmstate_heathrow;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -442,7 +442,7 @@ static void i8259_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_parent_realize(dc, pic_realize, &k->parent_realize);
- dc->reset = pic_reset;
+ device_class_set_legacy_reset(dc, pic_reset);
}
static const TypeInfo i8259_info = {
@@ -346,7 +346,7 @@ static void imx_avic_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_imx_avic;
- dc->reset = imx_avic_reset;
+ device_class_set_legacy_reset(dc, imx_avic_reset);
dc->desc = "i.MX Advanced Vector Interrupt Controller";
}
@@ -106,7 +106,7 @@ static void imx_gpcv2_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = imx_gpcv2_reset;
+ device_class_set_legacy_reset(dc, imx_gpcv2_reset);
dc->vmsd = &vmstate_imx_gpcv2;
dc->desc = "i.MX GPCv2 Module";
}
@@ -493,7 +493,7 @@ static void ioapic_class_init(ObjectClass *klass, void *data)
* migration, otherwise first 24 gsi routes will be invalid.
*/
k->post_load = ioapic_update_kvm_routes;
- dc->reset = ioapic_reset_common;
+ device_class_set_legacy_reset(dc, ioapic_reset_common);
device_class_set_props(dc, ioapic_properties);
}
@@ -440,7 +440,7 @@ static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = loongarch_extioi_realize;
- dc->reset = loongarch_extioi_reset;
+ device_class_set_legacy_reset(dc, loongarch_extioi_reset);
device_class_set_props(dc, extioi_properties);
dc->vmsd = &vmstate_loongarch_extioi;
}
@@ -442,7 +442,7 @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = loongarch_pch_pic_realize;
- dc->reset = loongarch_pch_pic_reset;
+ device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
dc->vmsd = &vmstate_loongarch_pch_pic;
device_class_set_props(dc, loongarch_pch_pic_properties);
}
@@ -99,7 +99,7 @@ static void m68k_irqc_class_init(ObjectClass *oc, void *data)
device_class_set_props(dc, m68k_irqc_properties);
nc->nmi_monitor_handler = m68k_nmi;
- dc->reset = m68k_irqc_reset;
+ device_class_set_legacy_reset(dc, m68k_irqc_reset);
dc->vmsd = &vmstate_m68k_irqc;
ic->get_statistics = m68k_irqc_get_statistics;
ic->print_info = m68k_irqc_print_info;
@@ -406,7 +406,7 @@ static void omap_intc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = omap_inth_reset;
+ device_class_set_legacy_reset(dc, omap_inth_reset);
device_class_set_props(dc, omap_intc_properties);
/* Reason: pointer property "clk" */
dc->user_creatable = false;
@@ -659,7 +659,7 @@ static void omap2_intc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = omap_inth_reset;
+ device_class_set_legacy_reset(dc, omap_inth_reset);
device_class_set_props(dc, omap2_intc_properties);
/* Reason: pointer property "iclk", "fclk" */
dc->user_creatable = false;
@@ -1620,7 +1620,7 @@ static void openpic_class_init(ObjectClass *oc, void *data)
dc->realize = openpic_realize;
device_class_set_props(dc, openpic_properties);
- dc->reset = openpic_reset;
+ device_class_set_legacy_reset(dc, openpic_reset);
dc->vmsd = &vmstate_openpic;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -274,7 +274,7 @@ static void kvm_openpic_class_init(ObjectClass *oc, void *data)
dc->realize = kvm_openpic_realize;
device_class_set_props(dc, kvm_openpic_properties);
- dc->reset = kvm_openpic_reset;
+ device_class_set_legacy_reset(dc, kvm_openpic_reset);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -277,7 +277,7 @@ static void pl190_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pl190_reset;
+ device_class_set_legacy_reset(dc, pl190_reset);
dc->vmsd = &vmstate_pl190;
}
@@ -286,7 +286,7 @@ static void ppc_uic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = ppc_uic_reset;
+ device_class_set_legacy_reset(dc, ppc_uic_reset);
dc->realize = ppc_uic_realize;
dc->vmsd = &ppc_uic_vmstate;
device_class_set_props(dc, ppc_uic_properties);
@@ -457,7 +457,7 @@ static void qemu_s390_flic_class_init(ObjectClass *oc, void *data)
S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);
device_class_set_props(dc, qemu_s390_flic_properties);
- dc->reset = qemu_s390_flic_reset;
+ device_class_set_legacy_reset(dc, qemu_s390_flic_reset);
dc->vmsd = &qemu_s390_flic_vmstate;
fsc->register_io_adapter = qemu_s390_register_io_adapter;
fsc->io_adapter_map = qemu_s390_io_adapter_map;
@@ -679,7 +679,7 @@ static void kvm_s390_flic_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, kvm_s390_flic_realize,
&kfsc->parent_realize);
dc->vmsd = &kvm_s390_flic_vmstate;
- dc->reset = kvm_s390_flic_reset;
+ device_class_set_legacy_reset(dc, kvm_s390_flic_reset);
fsc->register_io_adapter = kvm_s390_register_io_adapter;
fsc->io_adapter_map = kvm_s390_io_adapter_map;
fsc->add_adapter_routes = kvm_s390_add_adapter_routes;
@@ -444,7 +444,7 @@ static void sifive_plic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = sifive_plic_reset;
+ device_class_set_legacy_reset(dc, sifive_plic_reset);
device_class_set_props(dc, sifive_plic_properties);
dc->realize = sifive_plic_realize;
dc->vmsd = &vmstate_sifive_plic;
@@ -446,7 +446,7 @@ static void slavio_intctl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(klass);
- dc->reset = slavio_intctl_reset;
+ device_class_set_legacy_reset(dc, slavio_intctl_reset);
dc->vmsd = &vmstate_intctl;
#ifdef DEBUG_IRQ_COUNT
ic->get_statistics = slavio_intctl_get_statistics;
@@ -536,7 +536,7 @@ static void xlnx_pmu_io_intc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xlnx_pmu_io_intc_reset;
+ device_class_set_legacy_reset(dc, xlnx_pmu_io_intc_reset);
dc->realize = xlnx_pmu_io_intc_realize;
dc->vmsd = &vmstate_xlnx_pmu_io_intc;
device_class_set_props(dc, xlnx_pmu_io_intc_properties);
@@ -359,7 +359,7 @@ static void xlnx_zynqmp_ipi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xlnx_zynqmp_ipi_reset;
+ device_class_set_legacy_reset(dc, xlnx_zynqmp_ipi_reset);
dc->realize = xlnx_zynqmp_ipi_realize;
dc->vmsd = &vmstate_zynqmp_pmu_ipi;
}
@@ -885,7 +885,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data)
AcpiDevAmlIfClass *amldevc = ACPI_DEV_AML_IF_CLASS(klass);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
- dc->reset = ich9_lpc_reset;
+ device_class_set_legacy_reset(dc, ich9_lpc_reset);
k->realize = ich9_lpc_realize;
dc->vmsd = &vmstate_ich9_lpc;
device_class_set_props(dc, ich9_lpc_properties);
@@ -338,7 +338,7 @@ static void pc87312_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
- dc->reset = pc87312_reset;
+ device_class_set_legacy_reset(dc, pc87312_reset);
dc->vmsd = &vmstate_pc87312;
device_class_set_parent_realize(dc, pc87312_realize,
&sc->parent_realize);
@@ -425,7 +425,7 @@ static void pci_piix_class_init(ObjectClass *klass, void *data)
AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
k->config_write = piix_write_config;
- dc->reset = piix_reset;
+ device_class_set_legacy_reset(dc, piix_reset);
dc->desc = "ISA bridge";
dc->hotpluggable = false;
k->vendor_id = PCI_VENDOR_ID_INTEL;
@@ -232,7 +232,7 @@ static void via_pm_class_init(ObjectClass *klass, void *data)
k->device_id = info->device_id;
k->class_id = PCI_CLASS_BRIDGE_OTHER;
k->revision = 0x40;
- dc->reset = via_pm_reset;
+ device_class_set_legacy_reset(dc, via_pm_reset);
/* Reason: part of VIA south bridge, does not exist stand alone */
dc->user_creatable = false;
dc->vmsd = &vmstate_acpi;
@@ -461,7 +461,7 @@ static void vt82c686b_superio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
- dc->reset = vt82c686b_superio_reset;
+ device_class_set_legacy_reset(dc, vt82c686b_superio_reset);
sc->serial.count = 2;
sc->parallel.count = 1;
sc->ide.count = 0; /* emulated by via-ide */
@@ -570,7 +570,7 @@ static void vt8231_superio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
- dc->reset = vt8231_superio_reset;
+ device_class_set_legacy_reset(dc, vt8231_superio_reset);
sc->serial.count = 1;
sc->parallel.count = 1;
sc->ide.count = 0; /* emulated by via-ide */
@@ -844,7 +844,7 @@ static void vt82c686b_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA;
k->class_id = PCI_CLASS_BRIDGE_ISA;
k->revision = 0x40;
- dc->reset = vt82c686b_isa_reset;
+ device_class_set_legacy_reset(dc, vt82c686b_isa_reset);
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_via;
/* Reason: part of VIA VT82C686 southbridge, needs to be wired up */
@@ -909,7 +909,7 @@ static void vt8231_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_VIA_8231_ISA;
k->class_id = PCI_CLASS_BRIDGE_ISA;
k->revision = 0x10;
- dc->reset = vt8231_isa_reset;
+ device_class_set_legacy_reset(dc, vt8231_isa_reset);
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_via;
/* Reason: part of VIA VT8231 southbridge, needs to be wired up */
@@ -614,7 +614,7 @@ static void mcf5206_mbar_class_init(ObjectClass *oc, void *data)
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->desc = "MCF5206 system integration module";
dc->realize = mcf5206_mbar_realize;
- dc->reset = m5206_mbar_reset;
+ device_class_set_legacy_reset(dc, m5206_mbar_reset);
}
static const TypeInfo mcf5206_mbar_info = {
@@ -189,7 +189,7 @@ static void mcf_intc_class_init(ObjectClass *oc, void *data)
device_class_set_props(dc, mcf_intc_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = mcf_intc_reset;
+ device_class_set_legacy_reset(dc, mcf_intc_reset);
}
static const TypeInfo mcf_intc_gate_info = {
@@ -959,7 +959,7 @@ static void next_pc_class_init(ObjectClass *klass, void *data)
dc->desc = "NeXT Peripheral Controller";
dc->realize = next_pc_realize;
- dc->reset = next_pc_reset;
+ device_class_set_legacy_reset(dc, next_pc_reset);
device_class_set_props(dc, next_pc_properties);
dc->vmsd = &next_pc_vmstate;
}
@@ -271,7 +271,7 @@ static void nextkbd_class_init(ObjectClass *oc, void *data)
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->vmsd = &nextkbd_vmstate;
dc->realize = nextkbd_realize;
- dc->reset = nextkbd_reset;
+ device_class_set_legacy_reset(dc, nextkbd_reset);
}
static const TypeInfo nextkbd_info = {
@@ -2144,7 +2144,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->desc = "CXL Memory Device (Type 3)";
- dc->reset = ct3d_reset;
+ device_class_set_legacy_reset(dc, ct3d_reset);
device_class_set_props(dc, ct3_props);
cvc->get_lsa_size = get_lsa_size;
@@ -134,7 +134,7 @@ static void a9_scu_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, a9_scu_properties);
dc->vmsd = &vmstate_a9_scu;
- dc->reset = a9_scu_reset;
+ device_class_set_legacy_reset(dc, a9_scu_reset);
dc->realize = a9_scu_realize;
}
@@ -262,7 +262,7 @@ static void allwinner_cpucfg_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_cpucfg_reset;
+ device_class_set_legacy_reset(dc, allwinner_cpucfg_reset);
dc->vmsd = &allwinner_cpucfg_vmstate;
}
@@ -222,7 +222,7 @@ static void allwinner_h3_ccu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_h3_ccu_reset;
+ device_class_set_legacy_reset(dc, allwinner_h3_ccu_reset);
dc->vmsd = &allwinner_h3_ccu_vmstate;
}
@@ -336,7 +336,7 @@ static void allwinner_h3_dramc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_h3_dramc_reset;
+ device_class_set_legacy_reset(dc, allwinner_h3_dramc_reset);
dc->vmsd = &allwinner_h3_dramc_vmstate;
dc->realize = allwinner_h3_dramc_realize;
device_class_set_props(dc, allwinner_h3_dramc_properties);
@@ -120,7 +120,7 @@ static void allwinner_h3_sysctrl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_h3_sysctrl_reset;
+ device_class_set_legacy_reset(dc, allwinner_h3_sysctrl_reset);
dc->vmsd = &allwinner_h3_sysctrl_vmstate;
}
@@ -189,7 +189,7 @@ static void allwinner_r40_ccu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_r40_ccu_reset;
+ device_class_set_legacy_reset(dc, allwinner_r40_ccu_reset);
dc->vmsd = &allwinner_r40_ccu_vmstate;
}
@@ -489,7 +489,7 @@ static void allwinner_r40_dramc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_r40_dramc_reset;
+ device_class_set_legacy_reset(dc, allwinner_r40_dramc_reset);
dc->vmsd = &allwinner_r40_dramc_vmstate;
dc->realize = allwinner_r40_dramc_realize;
device_class_set_props(dc, allwinner_r40_dramc_properties);
@@ -148,7 +148,7 @@ static void allwinner_sid_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_sid_reset;
+ device_class_set_legacy_reset(dc, allwinner_sid_reset);
dc->vmsd = &allwinner_sid_vmstate;
device_class_set_props(dc, allwinner_sid_properties);
}
@@ -139,7 +139,7 @@ static void allwinner_sramc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_sramc_reset;
+ device_class_set_legacy_reset(dc, allwinner_sramc_reset);
dc->vmsd = &allwinner_sramc_vmstate;
}
@@ -383,7 +383,7 @@ static void qdev_applesmc_class_init(ObjectClass *klass, void *data)
dc->realize = applesmc_isa_realize;
dc->unrealize = applesmc_unrealize;
- dc->reset = qdev_applesmc_isa_reset;
+ device_class_set_legacy_reset(dc, qdev_applesmc_isa_reset);
device_class_set_props(dc, applesmc_isa_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
adevc->build_dev_aml = build_applesmc_aml;
@@ -184,7 +184,7 @@ static void l2x0_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_l2x0;
device_class_set_props(dc, l2x0_properties);
- dc->reset = l2x0_priv_reset;
+ device_class_set_legacy_reset(dc, l2x0_priv_reset);
}
static const TypeInfo l2x0_info = {
@@ -640,7 +640,7 @@ static void arm_sysctl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = arm_sysctl_realize;
- dc->reset = arm_sysctl_reset;
+ device_class_set_legacy_reset(dc, arm_sysctl_reset);
dc->vmsd = &vmstate_arm_sysctl;
device_class_set_props(dc, arm_sysctl_properties);
}
@@ -129,7 +129,7 @@ static void pwrctrl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pwrctrl_reset;
+ device_class_set_legacy_reset(dc, pwrctrl_reset);
dc->vmsd = &pwrctrl_vmstate;
}
@@ -180,7 +180,7 @@ static void armsse_mhu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = armsse_mhu_reset;
+ device_class_set_legacy_reset(dc, armsse_mhu_reset);
dc->vmsd = &armsse_mhu_vmstate;
}
@@ -446,7 +446,7 @@ static void aspeed_hace_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_hace_realize;
- dc->reset = aspeed_hace_reset;
+ device_class_set_legacy_reset(dc, aspeed_hace_reset);
device_class_set_props(dc, aspeed_hace_properties);
dc->vmsd = &vmstate_aspeed_hace;
}
@@ -334,7 +334,7 @@ static void aspeed_i3c_device_class_init(ObjectClass *klass, void *data)
dc->desc = "Aspeed I3C Device";
dc->realize = aspeed_i3c_device_realize;
- dc->reset = aspeed_i3c_device_reset;
+ device_class_set_legacy_reset(dc, aspeed_i3c_device_reset);
device_class_set_props(dc, aspeed_i3c_device_properties);
}
@@ -362,7 +362,7 @@ static void aspeed_i3c_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_i3c_realize;
- dc->reset = aspeed_i3c_reset;
+ device_class_set_legacy_reset(dc, aspeed_i3c_reset);
dc->desc = "Aspeed I3C Controller";
dc->vmsd = &vmstate_aspeed_i3c;
}
@@ -464,7 +464,7 @@ static void aspeed_lpc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_lpc_realize;
- dc->reset = aspeed_lpc_reset;
+ device_class_set_legacy_reset(dc, aspeed_lpc_reset);
dc->desc = "Aspeed LPC Controller",
dc->vmsd = &vmstate_aspeed_lpc;
device_class_set_props(dc, aspeed_lpc_properties);
@@ -135,7 +135,7 @@ static void aspeed_peci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_peci_realize;
- dc->reset = aspeed_peci_reset;
+ device_class_set_legacy_reset(dc, aspeed_peci_reset);
dc->desc = "Aspeed PECI Controller";
}
@@ -147,7 +147,7 @@ static void aspeed_sbc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_sbc_realize;
- dc->reset = aspeed_sbc_reset;
+ device_class_set_legacy_reset(dc, aspeed_sbc_reset);
dc->vmsd = &vmstate_aspeed_sbc;
device_class_set_props(dc, aspeed_sbc_properties);
}
@@ -614,7 +614,7 @@ static void aspeed_scu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_scu_realize;
- dc->reset = aspeed_scu_reset;
+ device_class_set_legacy_reset(dc, aspeed_scu_reset);
dc->desc = "ASPEED System Control Unit";
dc->vmsd = &vmstate_aspeed_scu;
device_class_set_props(dc, aspeed_scu_properties);
@@ -831,7 +831,7 @@ static void aspeed_2600_scu_class_init(ObjectClass *klass, void *data)
AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);
dc->desc = "ASPEED 2600 System Control Unit";
- dc->reset = aspeed_ast2600_scu_reset;
+ device_class_set_legacy_reset(dc, aspeed_ast2600_scu_reset);
asc->resets = ast2600_a3_resets;
asc->calc_hpll = aspeed_2600_scu_calc_hpll;
asc->get_apb = aspeed_2600_scu_get_apb_freq;
@@ -947,7 +947,7 @@ static void aspeed_2700_scu_class_init(ObjectClass *klass, void *data)
AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);
dc->desc = "ASPEED 2700 System Control Unit";
- dc->reset = aspeed_ast2700_scu_reset;
+ device_class_set_legacy_reset(dc, aspeed_ast2700_scu_reset);
asc->resets = ast2700_a0_resets;
asc->calc_hpll = aspeed_2600_scu_calc_hpll;
asc->get_apb = aspeed_2700_scu_get_apb_freq;
@@ -1061,7 +1061,7 @@ static void aspeed_2700_scuio_class_init(ObjectClass *klass, void *data)
AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);
dc->desc = "ASPEED 2700 System Control Unit I/O";
- dc->reset = aspeed_ast2700_scu_reset;
+ device_class_set_legacy_reset(dc, aspeed_ast2700_scu_reset);
asc->resets = ast2700_a0_resets_io;
asc->calc_hpll = aspeed_2600_scu_calc_hpll;
asc->get_apb = aspeed_2700_scuio_get_apb_freq;
@@ -1119,7 +1119,7 @@ static void aspeed_1030_scu_class_init(ObjectClass *klass, void *data)
AspeedSCUClass *asc = ASPEED_SCU_CLASS(klass);
dc->desc = "ASPEED 1030 System Control Unit";
- dc->reset = aspeed_ast1030_scu_reset;
+ device_class_set_legacy_reset(dc, aspeed_ast1030_scu_reset);
asc->resets = ast1030_a1_resets;
asc->calc_hpll = aspeed_2600_scu_calc_hpll;
asc->get_apb = aspeed_1030_scu_get_apb_freq;
@@ -304,7 +304,7 @@ static void aspeed_sdmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_sdmc_realize;
- dc->reset = aspeed_sdmc_reset;
+ device_class_set_legacy_reset(dc, aspeed_sdmc_reset);
dc->desc = "ASPEED SDRAM Memory Controller";
dc->vmsd = &vmstate_aspeed_sdmc;
device_class_set_props(dc, aspeed_sdmc_properties);
@@ -677,7 +677,7 @@ static void aspeed_2700_sdmc_class_init(ObjectClass *klass, void *data)
AspeedSDMCClass *asc = ASPEED_SDMC_CLASS(klass);
dc->desc = "ASPEED 2700 SDRAM Memory Controller";
- dc->reset = aspeed_2700_sdmc_reset;
+ device_class_set_legacy_reset(dc, aspeed_2700_sdmc_reset);
asc->is_bus64bit = true;
asc->max_ram_size = 8 * GiB;
@@ -222,7 +222,7 @@ static void aspeed_xdma_class_init(ObjectClass *classp, void *data)
DeviceClass *dc = DEVICE_CLASS(classp);
dc->realize = aspeed_xdma_realize;
- dc->reset = aspeed_xdma_reset;
+ device_class_set_legacy_reset(dc, aspeed_xdma_reset);
dc->vmsd = &aspeed_xdma_vmstate;
}
@@ -94,7 +94,7 @@ static void avr_mask_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = avr_mask_reset;
+ device_class_set_legacy_reset(dc, avr_mask_reset);
}
static const TypeInfo avr_mask_info = {
@@ -135,7 +135,7 @@ static void pll_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pll_reset;
+ device_class_set_legacy_reset(dc, pll_reset);
dc->vmsd = &pll_vmstate;
}
@@ -239,7 +239,7 @@ static void pll_channel_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pll_channel_reset;
+ device_class_set_legacy_reset(dc, pll_channel_reset);
dc->vmsd = &pll_channel_vmstate;
}
@@ -360,7 +360,7 @@ static void clock_mux_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = clock_mux_reset;
+ device_class_set_legacy_reset(dc, clock_mux_reset);
dc->vmsd = &clock_mux_vmstate;
}
@@ -788,7 +788,7 @@ static void cprman_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = cprman_realize;
- dc->reset = cprman_reset;
+ device_class_set_legacy_reset(dc, cprman_reset);
dc->vmsd = &cprman_vmstate;
device_class_set_props(dc, cprman_properties);
}
@@ -319,7 +319,7 @@ static void bcm2835_mbox_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = bcm2835_mbox_realize;
- dc->reset = bcm2835_mbox_reset;
+ device_class_set_legacy_reset(dc, bcm2835_mbox_reset);
dc->vmsd = &vmstate_bcm2835_mbox;
}
@@ -171,7 +171,7 @@ static void mphi_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mphi_realize;
- dc->reset = mphi_reset;
+ device_class_set_legacy_reset(dc, mphi_reset);
dc->vmsd = &vmstate_mphi_state;
}
@@ -140,7 +140,7 @@ static void bcm2835_powermgt_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_powermgt_reset;
+ device_class_set_legacy_reset(dc, bcm2835_powermgt_reset);
dc->vmsd = &vmstate_bcm2835_powermgt;
}
@@ -127,7 +127,7 @@ static void bcm2835_rng_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_rng_reset;
+ device_class_set_legacy_reset(dc, bcm2835_rng_reset);
dc->vmsd = &vmstate_bcm2835_rng;
}
@@ -118,7 +118,7 @@ static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = bcm2835_thermal_realize;
- dc->reset = bcm2835_thermal_reset;
+ device_class_set_legacy_reset(dc, bcm2835_thermal_reset);
dc->vmsd = &bcm2835_thermal_vmstate;
}
@@ -335,7 +335,7 @@ static void ecc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = ecc_realize;
- dc->reset = ecc_reset;
+ device_class_set_legacy_reset(dc, ecc_reset);
dc->vmsd = &vmstate_ecc;
device_class_set_props(dc, ecc_properties);
}
@@ -145,7 +145,7 @@ static void exynos4210_clk_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_clk_reset;
+ device_class_set_legacy_reset(dc, exynos4210_clk_reset);
dc->vmsd = &exynos4210_clk_vmstate;
}
@@ -502,7 +502,7 @@ static void exynos4210_pmu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_pmu_reset;
+ device_class_set_legacy_reset(dc, exynos4210_pmu_reset);
dc->vmsd = &exynos4210_pmu_vmstate;
}
@@ -259,7 +259,7 @@ static void exynos4210_rng_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_rng_reset;
+ device_class_set_legacy_reset(dc, exynos4210_rng_reset);
dc->vmsd = &exynos4210_rng_vmstate;
}
@@ -297,7 +297,7 @@ static void imx25_ccm_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
- dc->reset = imx25_ccm_reset;
+ device_class_set_legacy_reset(dc, imx25_ccm_reset);
dc->vmsd = &vmstate_imx25_ccm;
dc->desc = "i.MX25 Clock Control Module";
@@ -324,7 +324,7 @@ static void imx31_ccm_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
- dc->reset = imx31_ccm_reset;
+ device_class_set_legacy_reset(dc, imx31_ccm_reset);
dc->vmsd = &vmstate_imx31_ccm;
dc->desc = "i.MX31 Clock Control Module";
@@ -747,7 +747,7 @@ static void imx6_ccm_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
- dc->reset = imx6_ccm_reset;
+ device_class_set_legacy_reset(dc, imx6_ccm_reset);
dc->vmsd = &vmstate_imx6_ccm;
dc->desc = "i.MX6 Clock Control Module";
@@ -291,7 +291,7 @@ static void imx6_src_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx6_src_realize;
- dc->reset = imx6_src_reset;
+ device_class_set_legacy_reset(dc, imx6_src_reset);
dc->vmsd = &vmstate_imx6_src;
dc->desc = "i.MX6 System Reset Controller";
}
@@ -909,7 +909,7 @@ static void imx6ul_ccm_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
- dc->reset = imx6ul_ccm_reset;
+ device_class_set_legacy_reset(dc, imx6ul_ccm_reset);
dc->vmsd = &vmstate_imx6ul_ccm;
dc->desc = "i.MX6UL Clock Control Module";
@@ -267,7 +267,7 @@ static void imx7_ccm_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
- dc->reset = imx7_ccm_reset;
+ device_class_set_legacy_reset(dc, imx7_ccm_reset);
dc->vmsd = &vmstate_imx7_ccm;
dc->desc = "i.MX7 Clock Control Module";
@@ -297,7 +297,7 @@ static void imx7_analog_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = imx7_analog_reset;
+ device_class_set_legacy_reset(dc, imx7_analog_reset);
dc->vmsd = &vmstate_imx7_analog;
dc->desc = "i.MX7 Analog Module";
}
@@ -147,7 +147,7 @@ static void imx7_snvs_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = imx7_snvs_reset;
+ device_class_set_legacy_reset(dc, imx7_snvs_reset);
dc->vmsd = &vmstate_imx7_snvs;
dc->desc = "i.MX7 Secure Non-Volatile Storage Module";
}
@@ -256,7 +256,7 @@ static void imx7_src_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx7_src_realize;
- dc->reset = imx7_src_reset;
+ device_class_set_legacy_reset(dc, imx7_src_reset);
dc->vmsd = &vmstate_imx7_src;
dc->desc = "i.MX6 System Reset Controller";
}
@@ -259,7 +259,7 @@ static void imx_rngc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_rngc_realize;
- dc->reset = imx_rngc_reset;
+ device_class_set_legacy_reset(dc, imx_rngc_reset);
dc->desc = RNGC_NAME,
dc->vmsd = &vmstate_imx_rngc;
}
@@ -824,7 +824,7 @@ static void iotkit_secctl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &iotkit_secctl_vmstate;
- dc->reset = iotkit_secctl_reset;
+ device_class_set_legacy_reset(dc, iotkit_secctl_reset);
dc->realize = iotkit_secctl_realize;
device_class_set_props(dc, iotkit_secctl_props);
}
@@ -850,7 +850,7 @@ static void iotkit_sysctl_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &iotkit_sysctl_vmstate;
- dc->reset = iotkit_sysctl_reset;
+ device_class_set_legacy_reset(dc, iotkit_sysctl_reset);
device_class_set_props(dc, iotkit_sysctl_props);
dc->realize = iotkit_sysctl_realize;
}
@@ -991,7 +991,7 @@ static void ivshmem_common_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_IVSHMEM;
k->class_id = PCI_CLASS_MEMORY_RAM;
k->revision = 1;
- dc->reset = ivshmem_reset;
+ device_class_set_legacy_reset(dc, ivshmem_reset);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->desc = "Inter-VM shared memory";
}
@@ -267,7 +267,7 @@ static void lasi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = lasi_reset;
+ device_class_set_legacy_reset(dc, lasi_reset);
dc->vmsd = &vmstate_lasi;
}
@@ -114,7 +114,7 @@ static void led_class_init(ObjectClass *klass, void *data)
dc->desc = "LED";
dc->vmsd = &vmstate_led;
- dc->reset = led_reset;
+ device_class_set_legacy_reset(dc, led_reset);
dc->realize = led_realize;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
device_class_set_props(dc, led_properties);
@@ -564,7 +564,7 @@ static void cuda_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = cuda_realize;
- dc->reset = cuda_reset;
+ device_class_set_legacy_reset(dc, cuda_reset);
dc->vmsd = &vmstate_cuda;
device_class_set_props(dc, cuda_properties);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
@@ -194,7 +194,7 @@ static void macio_gpio_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc);
- dc->reset = macio_gpio_reset;
+ device_class_set_legacy_reset(dc, macio_gpio_reset);
dc->vmsd = &vmstate_macio_gpio;
nc->nmi_monitor_handler = macio_gpio_nmi;
}
@@ -922,7 +922,7 @@ static void mac_dbdma_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = mac_dbdma_realize;
- dc->reset = mac_dbdma_reset;
+ device_class_set_legacy_reset(dc, mac_dbdma_reset);
dc->vmsd = &vmstate_dbdma;
}
@@ -770,7 +770,7 @@ static void pmu_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = pmu_realize;
- dc->reset = pmu_reset;
+ device_class_set_legacy_reset(dc, pmu_reset);
dc->vmsd = &vmstate_pmu;
device_class_set_props(dc, pmu_properties);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
@@ -235,7 +235,7 @@ static void mips_gcr_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_props(dc, mips_gcr_properties);
dc->vmsd = &vmstate_mips_gcr;
- dc->reset = mips_gcr_reset;
+ device_class_set_legacy_reset(dc, mips_gcr_reset);
dc->realize = mips_gcr_realize;
}
@@ -174,7 +174,7 @@ static void mips_cpc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mips_cpc_realize;
- dc->reset = mips_cpc_reset;
+ device_class_set_legacy_reset(dc, mips_cpc_reset);
dc->vmsd = &vmstate_mips_cpc;
device_class_set_props(dc, mips_cpc_properties);
}
@@ -547,7 +547,7 @@ static void mips_itu_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, mips_itu_properties);
dc->realize = mips_itu_realize;
- dc->reset = mips_itu_reset;
+ device_class_set_legacy_reset(dc, mips_itu_reset);
}
static const TypeInfo mips_itu_info = {
@@ -335,7 +335,7 @@ static void mps2_fpgaio_class_init(ObjectClass *klass, void *data)
dc->vmsd = &mps2_fpgaio_vmstate;
dc->realize = mps2_fpgaio_realize;
- dc->reset = mps2_fpgaio_reset;
+ device_class_set_legacy_reset(dc, mps2_fpgaio_reset);
device_class_set_props(dc, mps2_fpgaio_properties);
}
@@ -481,7 +481,7 @@ static void mps2_scc_class_init(ObjectClass *klass, void *data)
dc->realize = mps2_scc_realize;
dc->vmsd = &mps2_scc_vmstate;
- dc->reset = mps2_scc_reset;
+ device_class_set_legacy_reset(dc, mps2_scc_reset);
device_class_set_props(dc, mps2_scc_properties);
}
@@ -142,7 +142,7 @@ static void msf2_sysreg_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_msf2_sysreg;
- dc->reset = msf2_sysreg_reset;
+ device_class_set_legacy_reset(dc, msf2_sysreg_reset);
device_class_set_props(dc, msf2_sysreg_properties);
dc->realize = msf2_sysreg_realize;
}
@@ -247,7 +247,7 @@ static void nrf51_rng_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, nrf51_rng_properties);
dc->vmsd = &vmstate_rng;
- dc->reset = nrf51_rng_reset;
+ device_class_set_legacy_reset(dc, nrf51_rng_reset);
}
static const TypeInfo nrf51_rng_info = {
@@ -337,7 +337,7 @@ static void pci_testdev_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_OTHERS;
dc->desc = "PCI Test Device";
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = qdev_pci_testdev_reset;
+ device_class_set_legacy_reset(dc, qdev_pci_testdev_reset);
device_class_set_props(dc, pci_testdev_properties);
}
@@ -299,7 +299,7 @@ static void sifive_e_aon_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- dc->reset = sifive_e_aon_reset;
+ device_class_set_legacy_reset(dc, sifive_e_aon_reset);
device_class_set_props(dc, sifive_e_aon_properties);
}
@@ -151,7 +151,7 @@ static void sifive_u_prci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = sifive_u_prci_realize;
- dc->reset = sifive_u_prci_reset;
+ device_class_set_legacy_reset(dc, sifive_u_prci_reset);
}
static const TypeInfo sifive_u_prci_info = {
@@ -487,7 +487,7 @@ static void slavio_misc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = slavio_misc_reset;
+ device_class_set_legacy_reset(dc, slavio_misc_reset);
dc->vmsd = &vmstate_misc;
}
@@ -142,7 +142,7 @@ static void stm32f2xx_syscfg_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f2xx_syscfg_reset;
+ device_class_set_legacy_reset(dc, stm32f2xx_syscfg_reset);
}
static const TypeInfo stm32f2xx_syscfg_info = {
@@ -168,7 +168,7 @@ static void stm32f4xx_exti_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f4xx_exti_reset;
+ device_class_set_legacy_reset(dc, stm32f4xx_exti_reset);
dc->vmsd = &vmstate_stm32f4xx_exti;
}
@@ -151,7 +151,7 @@ static void stm32f4xx_syscfg_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f4xx_syscfg_reset;
+ device_class_set_legacy_reset(dc, stm32f4xx_syscfg_reset);
dc->vmsd = &vmstate_stm32f4xx_syscfg;
}
@@ -599,7 +599,7 @@ static void tz_mpc_class_init(ObjectClass *klass, void *data)
dc->realize = tz_mpc_realize;
dc->vmsd = &tz_mpc_vmstate;
- dc->reset = tz_mpc_reset;
+ device_class_set_legacy_reset(dc, tz_mpc_reset);
device_class_set_props(dc, tz_mpc_properties);
}
@@ -292,7 +292,7 @@ static void tz_msc_class_init(ObjectClass *klass, void *data)
dc->realize = tz_msc_realize;
dc->vmsd = &tz_msc_vmstate;
- dc->reset = tz_msc_reset;
+ device_class_set_legacy_reset(dc, tz_msc_reset);
device_class_set_props(dc, tz_msc_properties);
}
@@ -332,7 +332,7 @@ static void tz_ppc_class_init(ObjectClass *klass, void *data)
dc->realize = tz_ppc_realize;
dc->vmsd = &tz_ppc_vmstate;
- dc->reset = tz_ppc_reset;
+ device_class_set_legacy_reset(dc, tz_ppc_reset);
device_class_set_props(dc, tz_ppc_properties);
}
@@ -129,7 +129,7 @@ static void virt_ctrl_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- dc->reset = virt_ctrl_reset;
+ device_class_set_legacy_reset(dc, virt_ctrl_reset);
dc->realize = virt_ctrl_realize;
dc->vmsd = &vmstate_virt_ctrl;
}
@@ -502,7 +502,7 @@ static void cfu_apb_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = cfu_apb_reset;
+ device_class_set_legacy_reset(dc, cfu_apb_reset);
dc->vmsd = &vmstate_cfu_apb;
device_class_set_props(dc, cfu_props);
}
@@ -881,7 +881,7 @@ static void allwinner_sun8i_emac_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = allwinner_sun8i_emac_realize;
- dc->reset = allwinner_sun8i_emac_reset;
+ device_class_set_legacy_reset(dc, allwinner_sun8i_emac_reset);
dc->vmsd = &vmstate_aw_emac;
device_class_set_props(dc, allwinner_sun8i_emac_properties);
}
@@ -521,7 +521,7 @@ static void aw_emac_class_init(ObjectClass *klass, void *data)
dc->realize = aw_emac_realize;
device_class_set_props(dc, aw_emac_properties);
- dc->reset = aw_emac_reset;
+ device_class_set_legacy_reset(dc, aw_emac_reset);
dc->vmsd = &vmstate_aw_emac;
}
@@ -1809,7 +1809,7 @@ static void gem_class_init(ObjectClass *klass, void *data)
dc->realize = gem_realize;
device_class_set_props(dc, gem_properties);
dc->vmsd = &vmstate_cadence_gem;
- dc->reset = gem_reset;
+ device_class_set_legacy_reset(dc, gem_reset);
}
static const TypeInfo gem_info = {
@@ -299,7 +299,7 @@ static void kvaser_pci_class_init(ObjectClass *klass, void *data)
k->class_id = 0x00ff00;
dc->desc = "Kvaser PCICANx";
dc->vmsd = &vmstate_kvaser_pci;
- dc->reset = kvaser_pci_reset;
+ device_class_set_legacy_reset(dc, kvaser_pci_reset);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
@@ -243,7 +243,7 @@ static void mioe3680_pci_class_init(ObjectClass *klass, void *data)
dc->desc = "Mioe3680 PCICANx";
dc->vmsd = &vmstate_mioe3680_pci;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = mioe3680_pci_reset;
+ device_class_set_legacy_reset(dc, mioe3680_pci_reset);
}
static const TypeInfo mioe3680_pci_info = {
@@ -244,7 +244,7 @@ static void pcm3680i_pci_class_init(ObjectClass *klass, void *data)
dc->desc = "Pcm3680i PCICANx";
dc->vmsd = &vmstate_pcm3680i_pci;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = pcm3680i_pci_reset;
+ device_class_set_legacy_reset(dc, pcm3680i_pci_reset);
}
static const TypeInfo pcm3680i_pci_info = {
@@ -257,7 +257,7 @@ static void ctucan_pci_class_init(ObjectClass *klass, void *data)
dc->desc = "CTU CAN PCI";
dc->vmsd = &vmstate_ctucan_pci;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = ctucan_pci_reset;
+ device_class_set_legacy_reset(dc, ctucan_pci_reset);
}
static const TypeInfo ctucan_pci_info = {
@@ -2088,7 +2088,7 @@ static void canfd_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = canfd_reset;
+ device_class_set_legacy_reset(dc, canfd_reset);
dc->realize = canfd_realize;
device_class_set_props(dc, canfd_core_properties);
dc->vmsd = &vmstate_canfd;
@@ -946,7 +946,7 @@ static void dp8393x_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->realize = dp8393x_realize;
- dc->reset = dp8393x_reset;
+ device_class_set_legacy_reset(dc, dp8393x_reset);
dc->vmsd = &vmstate_dp8393x;
device_class_set_props(dc, dp8393x_properties);
}
@@ -638,7 +638,7 @@ static void etraxfs_eth_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = etraxfs_eth_realize;
- dc->reset = etraxfs_eth_reset;
+ device_class_set_legacy_reset(dc, etraxfs_eth_reset);
device_class_set_props(dc, etraxfs_eth_properties);
/* Reason: dma_out, dma_in are not user settable */
dc->user_creatable = false;
@@ -425,7 +425,7 @@ static void etsec_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = etsec_realize;
- dc->reset = etsec_reset;
+ device_class_set_legacy_reset(dc, etsec_reset);
device_class_set_props(dc, etsec_properties);
/* Supported by ppce500 machine */
dc->user_creatable = true;
@@ -1267,7 +1267,7 @@ static void ftgmac100_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_ftgmac100;
- dc->reset = ftgmac100_reset;
+ device_class_set_legacy_reset(dc, ftgmac100_reset);
device_class_set_props(dc, ftgmac100_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->realize = ftgmac100_realize;
@@ -1427,7 +1427,7 @@ static void aspeed_mii_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_aspeed_mii;
- dc->reset = aspeed_mii_reset;
+ device_class_set_legacy_reset(dc, aspeed_mii_reset);
dc->realize = aspeed_mii_realize;
dc->desc = "Aspeed MII controller";
device_class_set_props(dc, aspeed_mii_properties);
@@ -1354,7 +1354,7 @@ static void imx_eth_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_imx_eth;
- dc->reset = imx_eth_reset;
+ device_class_set_legacy_reset(dc, imx_eth_reset);
device_class_set_props(dc, imx_eth_properties);
dc->realize = imx_eth_realize;
dc->desc = "i.MX FEC/ENET Ethernet Controller";
@@ -1408,7 +1408,7 @@ static void lan9118_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = lan9118_reset;
+ device_class_set_legacy_reset(dc, lan9118_reset);
device_class_set_props(dc, lan9118_properties);
dc->vmsd = &vmstate_lan9118;
dc->realize = lan9118_realize;
@@ -151,7 +151,7 @@ static void lance_class_init(ObjectClass *klass, void *data)
dc->realize = lance_realize;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->fw_name = "ethernet";
- dc->reset = lance_reset;
+ device_class_set_legacy_reset(dc, lance_reset);
dc->vmsd = &vmstate_lance;
device_class_set_props(dc, lance_properties);
}
@@ -170,7 +170,7 @@ static void lasi_82596_class_init(ObjectClass *klass, void *data)
dc->realize = lasi_82596_realize;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->fw_name = "ethernet";
- dc->reset = lasi_82596_reset;
+ device_class_set_legacy_reset(dc, lasi_82596_reset);
dc->vmsd = &vmstate_lasi_82596;
dc->user_creatable = false;
device_class_set_props(dc, lasi_82596_properties);
@@ -673,7 +673,7 @@ static void mcf_fec_class_init(ObjectClass *oc, void *data)
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->realize = mcf_fec_realize;
dc->desc = "MCF Fast Ethernet Controller network device";
- dc->reset = mcf_fec_reset;
+ device_class_set_legacy_reset(dc, mcf_fec_reset);
device_class_set_props(dc, mcf_fec_properties);
}
@@ -278,7 +278,7 @@ static void mipsnet_class_init(ObjectClass *klass, void *data)
dc->realize = mipsnet_realize;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->desc = "MIPS Simulator network device";
- dc->reset = mipsnet_sysbus_reset;
+ device_class_set_legacy_reset(dc, mipsnet_sysbus_reset);
dc->vmsd = &vmstate_mipsnet;
device_class_set_props(dc, mipsnet_properties);
}
@@ -571,7 +571,7 @@ static void msf2_emac_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = msf2_emac_realize;
- dc->reset = msf2_emac_reset;
+ device_class_set_legacy_reset(dc, msf2_emac_reset);
dc->vmsd = &vmstate_msf2_emac;
device_class_set_props(dc, msf2_emac_properties);
}
@@ -859,7 +859,7 @@ static void npcm7xx_emc_class_init(ObjectClass *klass, void *data)
dc->desc = "NPCM7xx EMC Controller";
dc->realize = npcm7xx_emc_realize;
dc->unrealize = npcm7xx_emc_unrealize;
- dc->reset = npcm7xx_emc_reset;
+ device_class_set_legacy_reset(dc, npcm7xx_emc_reset);
dc->vmsd = &vmstate_npcm7xx_emc;
device_class_set_props(dc, npcm7xx_emc_properties);
}
@@ -926,7 +926,7 @@ static void npcm_gmac_class_init(ObjectClass *klass, void *data)
dc->desc = "NPCM GMAC Controller";
dc->realize = npcm_gmac_realize;
dc->unrealize = npcm_gmac_unrealize;
- dc->reset = npcm_gmac_reset;
+ device_class_set_legacy_reset(dc, npcm_gmac_reset);
dc->vmsd = &vmstate_npcm_gmac;
device_class_set_props(dc, npcm_gmac_properties);
}
@@ -755,7 +755,7 @@ static void open_eth_class_init(ObjectClass *klass, void *data)
dc->realize = sysbus_open_eth_realize;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->desc = "Opencores 10/100 Mbit Ethernet";
- dc->reset = qdev_open_eth_reset;
+ device_class_set_legacy_reset(dc, qdev_open_eth_reset);
device_class_set_props(dc, open_eth_properties);
}
@@ -269,7 +269,7 @@ static void pcnet_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_AMD_LANCE;
k->revision = 0x10;
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
- dc->reset = pci_reset;
+ device_class_set_legacy_reset(dc, pci_reset);
dc->vmsd = &vmstate_pci_pcnet;
device_class_set_props(dc, pcnet_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
@@ -1494,7 +1494,7 @@ static void rocker_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_NETWORK_OTHER;
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
dc->desc = "Rocker Switch";
- dc->reset = rocker_reset;
+ device_class_set_legacy_reset(dc, rocker_reset);
device_class_set_props(dc, rocker_properties);
dc->vmsd = &rocker_vmsd;
}
@@ -3429,7 +3429,7 @@ static void rtl8139_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_REALTEK_8139;
k->revision = RTL8139_PCI_REVID; /* >=0x20 is for 8139C+ */
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
- dc->reset = rtl8139_reset;
+ device_class_set_legacy_reset(dc, rtl8139_reset);
dc->vmsd = &vmstate_rtl8139;
device_class_set_props(dc, rtl8139_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
@@ -799,7 +799,7 @@ static void smc91c111_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = smc91c111_realize;
- dc->reset = smc91c111_reset;
+ device_class_set_legacy_reset(dc, smc91c111_reset);
dc->vmsd = &vmstate_smc91c111;
device_class_set_props(dc, smc91c111_properties);
}
@@ -507,7 +507,7 @@ static void stellaris_enet_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = stellaris_enet_realize;
- dc->reset = stellaris_enet_reset;
+ device_class_set_legacy_reset(dc, stellaris_enet_reset);
device_class_set_props(dc, stellaris_enet_properties);
dc->vmsd = &vmstate_stellaris_enet;
}
@@ -1467,7 +1467,7 @@ static void sungem_class_init(ObjectClass *klass, void *data)
k->revision = 0x01;
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
dc->vmsd = &vmstate_sungem;
- dc->reset = sungem_reset;
+ device_class_set_legacy_reset(dc, sungem_reset);
device_class_set_props(dc, sungem_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
}
@@ -948,7 +948,7 @@ static void sunhme_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_SUN_HME;
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
dc->vmsd = &vmstate_hme;
- dc->reset = sunhme_reset;
+ device_class_set_legacy_reset(dc, sunhme_reset);
device_class_set_props(dc, sunhme_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
}
@@ -1026,7 +1026,7 @@ static void tulip_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_NETWORK_ETHERNET;
dc->vmsd = &vmstate_pci_tulip;
device_class_set_props(dc, tulip_properties);
- dc->reset = tulip_qdev_reset;
+ device_class_set_legacy_reset(dc, tulip_qdev_reset);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
}
@@ -2512,7 +2512,7 @@ static void vmxnet3_class_init(ObjectClass *class, void *data)
device_class_set_parent_realize(dc, vmxnet3_realize,
&vc->parent_dc_realize);
dc->desc = "VMWare Paravirtualized Ethernet v3";
- dc->reset = vmxnet3_qdev_reset;
+ device_class_set_legacy_reset(dc, vmxnet3_qdev_reset);
dc->vmsd = &vmstate_vmxnet3;
device_class_set_props(dc, vmxnet3_properties);
set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
@@ -1014,7 +1014,7 @@ static void xilinx_enet_class_init(ObjectClass *klass, void *data)
dc->realize = xilinx_enet_realize;
device_class_set_props(dc, xilinx_enet_properties);
- dc->reset = xilinx_axienet_reset;
+ device_class_set_legacy_reset(dc, xilinx_axienet_reset);
}
static void xilinx_enet_control_stream_class_init(ObjectClass *klass,
@@ -263,7 +263,7 @@ static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = xilinx_ethlite_realize;
- dc->reset = xilinx_ethlite_reset;
+ device_class_set_legacy_reset(dc, xilinx_ethlite_reset);
device_class_set_props(dc, xilinx_ethlite_properties);
}
@@ -8845,7 +8845,7 @@ static void nvme_class_init(ObjectClass *oc, void *data)
dc->desc = "Non-Volatile Memory Express";
device_class_set_props(dc, nvme_props);
dc->vmsd = &nvme_vmstate;
- dc->reset = nvme_pci_reset;
+ device_class_set_legacy_reset(dc, nvme_pci_reset);
}
static void nvme_instance_init(Object *obj)
@@ -254,7 +254,7 @@ void at24c_eeprom_class_init(ObjectClass *klass, void *data)
k->send = &at24c_eeprom_send;
device_class_set_props(dc, at24c_eeprom_props);
- dc->reset = at24c_eeprom_reset;
+ device_class_set_legacy_reset(dc, at24c_eeprom_reset);
}
static
@@ -1260,7 +1260,7 @@ static void fw_cfg_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = fw_cfg_reset;
+ device_class_set_legacy_reset(dc, fw_cfg_reset);
dc->vmsd = &vmstate_fw_cfg;
device_class_set_props(dc, fw_cfg_properties);
@@ -147,7 +147,7 @@ static void macio_nvram_class_init(ObjectClass *oc, void *data)
dc->realize = macio_nvram_realizefn;
dc->unrealize = macio_nvram_unrealizefn;
- dc->reset = macio_nvram_reset;
+ device_class_set_legacy_reset(dc, macio_nvram_reset);
dc->vmsd = &vmstate_macio_nvram;
device_class_set_props(dc, macio_nvram_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
@@ -378,7 +378,7 @@ static void nrf51_nvm_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, nrf51_nvm_properties);
dc->vmsd = &vmstate_nvm;
dc->realize = nrf51_nvm_realize;
- dc->reset = nrf51_nvm_reset;
+ device_class_set_legacy_reset(dc, nrf51_nvm_reset);
}
static const TypeInfo nrf51_nvm_info = {
@@ -236,7 +236,7 @@ static void cxl_dsp_class_init(ObjectClass *oc, void *data)
k->revision = 0;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "CXL Switch Downstream Port";
- dc->reset = cxl_dsp_reset;
+ device_class_set_legacy_reset(dc, cxl_dsp_reset);
}
static const TypeInfo cxl_dsp_info = {
@@ -380,7 +380,7 @@ static void cxl_upstream_class_init(ObjectClass *oc, void *data)
k->revision = 0;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "CXL Switch Upstream Port";
- dc->reset = cxl_usp_reset;
+ device_class_set_legacy_reset(dc, cxl_usp_reset);
device_class_set_props(dc, cxl_upstream_props);
}
@@ -98,7 +98,7 @@ static void i82801b11_bridge_class_init(ObjectClass *klass, void *data)
k->realize = i82801b11_bridge_realize;
k->config_write = pci_bridge_write_config;
dc->vmsd = &i82801b11_bridge_dev_vmstate;
- dc->reset = pci_bridge_reset;
+ device_class_set_legacy_reset(dc, pci_bridge_reset);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
@@ -254,7 +254,7 @@ static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
k->class_id = PCI_CLASS_BRIDGE_PCI;
dc->desc = "Standard PCI Bridge";
- dc->reset = qdev_pci_bridge_dev_reset;
+ device_class_set_legacy_reset(dc, qdev_pci_bridge_dev_reset);
device_class_set_props(dc, pci_bridge_dev_properties);
dc->vmsd = &pci_bridge_dev_vmstate;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
@@ -515,7 +515,7 @@ static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
/* Host bridges aren't hotpluggable. FIXME: spec reference */
dc->hotpluggable = false;
- dc->reset = pxb_cxl_dev_reset;
+ device_class_set_legacy_reset(dc, pxb_cxl_dev_reset);
}
static const TypeInfo pxb_cxl_dev_info = {
@@ -152,7 +152,7 @@ static void pcie_pci_bridge_class_init(ObjectClass *klass, void *data)
k->config_write = pcie_pci_bridge_write_config;
dc->vmsd = &pcie_pci_bridge_dev_vmstate;
device_class_set_props(dc, pcie_pci_bridge_dev_properties);
- dc->reset = &pcie_pci_bridge_reset;
+ device_class_set_legacy_reset(dc, pcie_pci_bridge_reset);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
hc->plug = pci_bridge_dev_plug_cb;
hc->unplug = pci_bridge_dev_unplug_cb;
@@ -78,7 +78,7 @@ static void simba_pci_bridge_class_init(ObjectClass *klass, void *data)
k->revision = 0x11;
k->config_write = pci_bridge_write_config;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
- dc->reset = pci_bridge_reset;
+ device_class_set_legacy_reset(dc, pci_bridge_reset);
dc->vmsd = &vmstate_pci_device;
}
@@ -167,7 +167,7 @@ static void xio3130_downstream_class_init(ObjectClass *klass, void *data)
k->revision = XIO3130_REVISION;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "TI X3130 Downstream Port of PCI Express Switch";
- dc->reset = xio3130_downstream_reset;
+ device_class_set_legacy_reset(dc, xio3130_downstream_reset);
dc->vmsd = &vmstate_xio3130_downstream;
device_class_set_props(dc, xio3130_downstream_props);
}
@@ -136,7 +136,7 @@ static void xio3130_upstream_class_init(ObjectClass *klass, void *data)
k->revision = XIO3130_REVISION;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "TI X3130 Upstream Port of PCI Express Switch";
- dc->reset = xio3130_upstream_reset;
+ device_class_set_legacy_reset(dc, xio3130_upstream_reset);
dc->vmsd = &vmstate_xio3130_upstream;
}
@@ -489,7 +489,7 @@ static void elroy_pcihost_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = elroy_reset;
+ device_class_set_legacy_reset(dc, elroy_reset);
device_class_set_props(dc, elroy_pcihost_properties);
dc->vmsd = &vmstate_elroy;
dc->user_creatable = false;
@@ -865,7 +865,7 @@ static void astro_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = astro_reset;
+ device_class_set_legacy_reset(dc, astro_reset);
dc->vmsd = &vmstate_astro;
dc->realize = astro_realize;
/*
@@ -607,7 +607,7 @@ static void designware_pcie_root_class_init(ObjectClass *klass, void *data)
k->config_read = designware_pcie_root_config_read;
k->config_write = designware_pcie_root_config_write;
- dc->reset = pci_bridge_reset;
+ device_class_set_legacy_reset(dc, pci_bridge_reset);
/*
* PCI-facing part of the host bridge, not usable without the
* host-facing part, which can't be device_add'ed, yet.
@@ -502,7 +502,7 @@ static void dino_pcihost_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = dino_pcihost_reset;
+ device_class_set_legacy_reset(dc, dino_pcihost_reset);
dc->realize = dino_pcihost_realize;
dc->unrealize = dino_pcihost_unrealize;
device_class_set_props(dc, dino_pcihost_properties);
@@ -1289,7 +1289,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
device_class_set_props(dc, gt64120_properties);
dc->realize = gt64120_realize;
- dc->reset = gt64120_reset;
+ device_class_set_legacy_reset(dc, gt64120_reset);
dc->vmsd = &vmstate_gt64120;
}
@@ -928,7 +928,7 @@ static void mv64361_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mv64361_realize;
- dc->reset = mv64361_reset;
+ device_class_set_legacy_reset(dc, mv64361_reset);
}
static const TypeInfo mv64361_type_info = {
@@ -524,7 +524,7 @@ static void ppc440_pcix_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = ppc440_pcix_realize;
- dc->reset = ppc440_pcix_reset;
+ device_class_set_legacy_reset(dc, ppc440_pcix_reset);
}
static const TypeInfo ppc440_pcix_info = {
@@ -686,7 +686,7 @@ static void mch_class_init(ObjectClass *klass, void *data)
k->realize = mch_realize;
k->config_write = mch_write_config;
- dc->reset = mch_reset;
+ device_class_set_legacy_reset(dc, mch_reset);
device_class_set_props(dc, mch_props);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->desc = "Host bridge";
@@ -504,7 +504,7 @@ static void sabre_class_init(ObjectClass *klass, void *data)
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
dc->realize = sabre_realize;
- dc->reset = sabre_reset;
+ device_class_set_legacy_reset(dc, sabre_reset);
device_class_set_props(dc, sabre_properties);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->fw_name = "pci";
@@ -509,7 +509,7 @@ static void pci_vpb_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = pci_vpb_realize;
- dc->reset = pci_vpb_reset;
+ device_class_set_legacy_reset(dc, pci_vpb_reset);
dc->vmsd = &pci_vpb_vmstate;
device_class_set_props(dc, pci_vpb_properties);
}
@@ -300,7 +300,7 @@ static void xilinx_pcie_root_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_BRIDGE_HOST;
k->realize = xilinx_pcie_root_realize;
k->exit = pci_bridge_exitfn;
- dc->reset = pci_bridge_reset;
+ device_class_set_legacy_reset(dc, pci_bridge_reset);
k->config_read = xilinx_pcie_root_config_read;
k->config_write = xilinx_pcie_root_config_write;
/*
@@ -897,7 +897,7 @@ static void pnv_psi_power9_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV PSI Controller POWER9";
dc->realize = pnv_psi_power9_realize;
- dc->reset = pnv_psi_power9_reset;
+ device_class_set_legacy_reset(dc, pnv_psi_power9_reset);
ppc->xscom_pcba = PNV9_XSCOM_PSIHB_BASE;
ppc->xscom_size = PNV9_XSCOM_PSIHB_SIZE;
@@ -949,7 +949,7 @@ static void pnv_psi_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV PSI Controller";
device_class_set_props(dc, pnv_psi_properties);
- dc->reset = pnv_psi_reset;
+ device_class_set_legacy_reset(dc, pnv_psi_reset);
dc->user_creatable = false;
}
@@ -457,7 +457,7 @@ static void ref405ep_fpga_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ref405ep_fpga_realize;
- dc->reset = ref405ep_fpga_reset;
+ device_class_set_legacy_reset(dc, ref405ep_fpga_reset);
/* Reason: only works as part of a ppc405 board */
dc->user_creatable = false;
}
@@ -119,7 +119,7 @@ static void ppc405_pob_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_pob_realize;
- dc->reset = ppc405_pob_reset;
+ device_class_set_legacy_reset(dc, ppc405_pob_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -196,7 +196,7 @@ static void ppc405_opba_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_opba_realize;
- dc->reset = ppc405_opba_reset;
+ device_class_set_legacy_reset(dc, ppc405_opba_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -302,7 +302,7 @@ static void ppc405_dma_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_dma_realize;
- dc->reset = ppc405_dma_reset;
+ device_class_set_legacy_reset(dc, ppc405_dma_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -492,7 +492,7 @@ static void ppc405_ocm_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_ocm_realize;
- dc->reset = ppc405_ocm_reset;
+ device_class_set_legacy_reset(dc, ppc405_ocm_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -726,7 +726,7 @@ static void ppc405_gpt_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_gpt_realize;
- dc->reset = ppc405_gpt_reset;
+ device_class_set_legacy_reset(dc, ppc405_gpt_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -975,7 +975,7 @@ static void ppc405_cpc_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_cpc_realize;
- dc->reset = ppc405_cpc_reset;
+ device_class_set_legacy_reset(dc, ppc405_cpc_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc405_cpc_properties);
@@ -242,7 +242,7 @@ static void ppc4xx_mal_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_mal_realize;
- dc->reset = ppc4xx_mal_reset;
+ device_class_set_legacy_reset(dc, ppc4xx_mal_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_mal_properties);
@@ -332,7 +332,7 @@ static void ppc405_plb_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_plb_realize;
- dc->reset = ppc405_plb_reset;
+ device_class_set_legacy_reset(dc, ppc405_plb_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -518,7 +518,7 @@ static void ppc405_ebc_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_ebc_realize;
- dc->reset = ppc405_ebc_reset;
+ device_class_set_legacy_reset(dc, ppc405_ebc_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
}
@@ -437,7 +437,7 @@ static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_sdram_ddr_realize;
- dc->reset = ppc4xx_sdram_ddr_reset;
+ device_class_set_legacy_reset(dc, ppc4xx_sdram_ddr_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_sdram_ddr_props);
@@ -722,7 +722,7 @@ static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc4xx_sdram_ddr2_realize;
- dc->reset = ppc4xx_sdram_ddr2_reset;
+ device_class_set_legacy_reset(dc, ppc4xx_sdram_ddr2_reset);
/* Reason: only works as function of a ppc4xx SoC */
dc->user_creatable = false;
device_class_set_props(dc, ppc4xx_sdram_ddr2_props);
@@ -191,7 +191,7 @@ static void ppce500_spin_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = spin_reset;
+ device_class_set_legacy_reset(dc, spin_reset);
}
static const TypeInfo ppce500_spin_info = {
@@ -378,7 +378,7 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealize;
- dc->reset = spapr_cpu_core_reset;
+ device_class_set_legacy_reset(dc, spapr_cpu_core_reset);
device_class_set_props(dc, spapr_cpu_core_properties);
scc->cpu_type = data;
}
@@ -672,7 +672,7 @@ static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = spapr_tce_table_realize;
- dc->reset = spapr_tce_reset;
+ device_class_set_legacy_reset(dc, spapr_tce_reset);
dc->unrealize = spapr_tce_table_unrealize;
/* Reason: This is just an internal device for handling the hypercalls */
dc->user_creatable = false;
@@ -2248,7 +2248,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
dc->realize = spapr_phb_realize;
dc->unrealize = spapr_phb_unrealize;
device_class_set_props(dc, spapr_phb_properties);
- dc->reset = spapr_phb_reset;
+ device_class_set_legacy_reset(dc, spapr_phb_reset);
dc->vmsd = &vmstate_spapr_pci;
/* Supported by TYPE_SPAPR_MACHINE */
dc->user_creatable = true;
@@ -635,7 +635,7 @@ static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
{
DeviceClass *k = DEVICE_CLASS(klass);
k->realize = spapr_vio_busdev_realize;
- k->reset = spapr_vio_busdev_reset;
+ device_class_set_legacy_reset(k, spapr_vio_busdev_reset);
k->bus_type = TYPE_SPAPR_VIO_BUS;
}
@@ -206,7 +206,7 @@ static void pci_proxy_dev_class_init(ObjectClass *klass, void *data)
k->config_read = pci_proxy_read_config;
k->config_write = pci_proxy_write_config;
- dc->reset = proxy_device_reset;
+ device_class_set_legacy_reset(dc, proxy_device_reset);
device_class_set_props(dc, proxy_properties);
}
@@ -320,7 +320,7 @@ static void allwinner_rtc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_rtc_reset;
+ device_class_set_legacy_reset(dc, allwinner_rtc_reset);
dc->vmsd = &allwinner_rtc_vmstate;
device_class_set_props(dc, allwinner_rtc_properties);
}
@@ -162,7 +162,7 @@ static void aspeed_rtc_class_init(ObjectClass *klass, void *data)
dc->realize = aspeed_rtc_realize;
dc->vmsd = &vmstate_aspeed_rtc;
- dc->reset = aspeed_rtc_reset;
+ device_class_set_legacy_reset(dc, aspeed_rtc_reset);
}
static const TypeInfo aspeed_rtc_info = {
@@ -223,7 +223,7 @@ static void ds1338_class_init(ObjectClass *klass, void *data)
k->event = ds1338_event;
k->recv = ds1338_recv;
k->send = ds1338_send;
- dc->reset = ds1338_reset;
+ device_class_set_legacy_reset(dc, ds1338_reset);
dc->vmsd = &vmstate_ds1338;
}
@@ -596,7 +596,7 @@ static void exynos4210_rtc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_rtc_reset;
+ device_class_set_legacy_reset(dc, exynos4210_rtc_reset);
dc->vmsd = &vmstate_exynos4210_rtc_state;
}
@@ -298,7 +298,7 @@ static void goldfish_rtc_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, goldfish_rtc_properties);
dc->realize = goldfish_rtc_realize;
- dc->reset = goldfish_rtc_reset;
+ device_class_set_legacy_reset(dc, goldfish_rtc_reset);
dc->vmsd = &goldfish_rtc_vmstate;
}
@@ -469,7 +469,7 @@ static void ls7a_rtc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_ls7a_rtc;
dc->realize = ls7a_rtc_realize;
- dc->reset = ls7a_rtc_reset;
+ device_class_set_legacy_reset(dc, ls7a_rtc_reset);
dc->desc = "ls7a rtc";
}
@@ -120,7 +120,7 @@ static void m48txx_isa_class_init(ObjectClass *klass, void *data)
NvramClass *nc = NVRAM_CLASS(klass);
dc->realize = m48t59_isa_realize;
- dc->reset = m48t59_reset_isa;
+ device_class_set_legacy_reset(dc, m48t59_reset_isa);
device_class_set_props(dc, m48t59_isa_properties);
nc->read = m48txx_isa_read;
nc->write = m48txx_isa_write;
@@ -629,7 +629,7 @@ static void m48txx_sysbus_class_init(ObjectClass *klass, void *data)
NvramClass *nc = NVRAM_CLASS(klass);
dc->realize = m48t59_realize;
- dc->reset = m48t59_reset_sysbus;
+ device_class_set_legacy_reset(dc, m48t59_reset_sysbus);
device_class_set_props(dc, m48t59_sysbus_properties);
dc->vmsd = &vmstate_m48t59;
nc->read = m48txx_sysbus_read;
@@ -255,7 +255,7 @@ static void rtc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = rtc_reset;
+ device_class_set_legacy_reset(dc, rtc_reset);
dc->vmsd = &vmstate_rtc;
}
@@ -467,7 +467,7 @@ static void init_event_facility_class(ObjectClass *klass, void *data)
SCLPEventFacilityClass *k = EVENT_FACILITY_CLASS(dc);
dc->realize = realize_event_facility;
- dc->reset = reset_event_facility;
+ device_class_set_legacy_reset(dc, reset_event_facility);
dc->vmsd = &vmstate_event_facility;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
k->command_handler = command_handler;
@@ -770,7 +770,7 @@ static void s390_ipl_class_init(ObjectClass *klass, void *data)
dc->realize = s390_ipl_realize;
device_class_set_props(dc, s390_ipl_properties);
- dc->reset = s390_ipl_reset;
+ device_class_set_legacy_reset(dc, s390_ipl_reset);
dc->vmsd = &vmstate_ipl;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
/* Reason: Loads the ROMs and thus can only be used one time - internally */
@@ -1323,7 +1323,7 @@ static void s390_pcihost_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
- dc->reset = s390_pcihost_reset;
+ device_class_set_legacy_reset(dc, s390_pcihost_reset);
dc->realize = s390_pcihost_realize;
dc->unrealize = s390_pcihost_unrealize;
hc->pre_plug = s390_pcihost_pre_plug;
@@ -1506,7 +1506,7 @@ static void s390_pci_device_class_init(ObjectClass *klass, void *data)
dc->desc = "zpci device";
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- dc->reset = s390_pci_device_reset;
+ device_class_set_legacy_reset(dc, s390_pci_device_reset);
dc->bus_type = TYPE_S390_PCI_BUS;
dc->realize = s390_pci_device_realize;
device_class_set_props(dc, s390_pci_device_properties);
@@ -117,7 +117,7 @@ static void quiesce_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
SCLPEventClass *k = SCLP_EVENT_CLASS(klass);
- dc->reset = quiesce_reset;
+ device_class_set_legacy_reset(dc, quiesce_reset);
dc->vmsd = &vmstate_sclpquiesce;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
/*
@@ -440,7 +440,7 @@ static void esp_pci_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_STORAGE_SCSI;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->desc = "AMD Am53c974 PCscsi-PCI SCSI adapter";
- dc->reset = esp_pci_hard_reset;
+ device_class_set_legacy_reset(dc, esp_pci_hard_reset);
dc->vmsd = &vmstate_esp_pci_scsi;
}
@@ -1576,7 +1576,7 @@ static void sysbus_esp_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = sysbus_esp_realize;
- dc->reset = sysbus_esp_hard_reset;
+ device_class_set_legacy_reset(dc, sysbus_esp_hard_reset);
dc->vmsd = &vmstate_sysbus_esp_scsi;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -2386,7 +2386,7 @@ static void lsi_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_LSI_53C895A;
k->class_id = PCI_CLASS_STORAGE_SCSI;
k->subsystem_id = 0x1000;
- dc->reset = lsi_scsi_reset;
+ device_class_set_legacy_reset(dc, lsi_scsi_reset);
dc->vmsd = &vmstate_lsi_scsi;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@@ -2557,7 +2557,7 @@ static void megasas_class_init(ObjectClass *oc, void *data)
e->product_name = info->product_name;
e->product_version = info->product_version;
device_class_set_props(dc, info->props);
- dc->reset = megasas_scsi_reset;
+ device_class_set_legacy_reset(dc, megasas_scsi_reset);
dc->vmsd = info->vmsd;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->desc = info->desc;
@@ -1431,7 +1431,7 @@ static void mptsas1068_class_init(ObjectClass *oc, void *data)
pc->subsystem_id = 0x8000;
pc->class_id = PCI_CLASS_STORAGE_SCSI;
device_class_set_props(dc, mptsas_properties);
- dc->reset = mptsas_reset;
+ device_class_set_legacy_reset(dc, mptsas_reset);
dc->vmsd = &vmstate_mptsas;
dc->desc = "LSI SAS 1068";
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -3141,7 +3141,7 @@ static void scsi_disk_base_class_initfn(ObjectClass *klass, void *data)
SCSIDiskClass *sdc = SCSI_DISK_BASE_CLASS(klass);
dc->fw_name = "disk";
- dc->reset = scsi_disk_reset;
+ device_class_set_legacy_reset(dc, scsi_disk_reset);
sdc->dma_readv = scsi_dma_readv;
sdc->dma_writev = scsi_dma_writev;
sdc->need_fua_emulation = scsi_is_cmd_fua;
@@ -797,7 +797,7 @@ static void scsi_generic_class_initfn(ObjectClass *klass, void *data)
sc->parse_cdb = scsi_generic_parse_cdb;
dc->fw_name = "disk";
dc->desc = "pass through generic scsi device (/dev/sg*)";
- dc->reset = scsi_generic_reset;
+ device_class_set_legacy_reset(dc, scsi_generic_reset);
device_class_set_props(dc, scsi_generic_properties);
dc->vmsd = &vmstate_scsi_device;
}
@@ -1333,7 +1333,7 @@ static void pvscsi_class_init(ObjectClass *klass, void *data)
k->subsystem_id = 0x1000;
device_class_set_parent_realize(dc, pvscsi_realize,
&pvs_k->parent_dc_realize);
- dc->reset = pvscsi_reset;
+ device_class_set_legacy_reset(dc, pvscsi_reset);
dc->vmsd = &vmstate_pvscsi;
device_class_set_props(dc, pvscsi_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -900,7 +900,7 @@ static void allwinner_sdhost_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = allwinner_sdhost_reset;
+ device_class_set_legacy_reset(dc, allwinner_sdhost_reset);
dc->vmsd = &vmstate_allwinner_sdhost;
dc->realize = allwinner_sdhost_realize;
device_class_set_props(dc, allwinner_sdhost_properties);
@@ -193,7 +193,7 @@ static void aspeed_sdhci_class_init(ObjectClass *classp, void *data)
DeviceClass *dc = DEVICE_CLASS(classp);
dc->realize = aspeed_sdhci_realize;
- dc->reset = aspeed_sdhci_reset;
+ device_class_set_legacy_reset(dc, aspeed_sdhci_reset);
dc->vmsd = &vmstate_aspeed_sdhci;
device_class_set_props(dc, aspeed_sdhci_properties);
}
@@ -432,7 +432,7 @@ static void bcm2835_sdhost_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_sdhost_reset;
+ device_class_set_legacy_reset(dc, bcm2835_sdhost_reset);
dc->vmsd = &vmstate_bcm2835_sdhost;
}
@@ -171,7 +171,7 @@ static void cadence_sdhci_class_init(ObjectClass *classp, void *data)
dc->desc = "Cadence SD/SDIO/eMMC Host Controller (SD4HC)";
dc->realize = cadence_sdhci_realize;
- dc->reset = cadence_sdhci_reset;
+ device_class_set_legacy_reset(dc, cadence_sdhci_reset);
dc->vmsd = &vmstate_cadence_sdhci;
}
@@ -155,7 +155,7 @@ static void npcm7xx_sdhci_class_init(ObjectClass *classp, void *data)
dc->desc = "NPCM7xx SD/eMMC Host Controller";
dc->realize = npcm7xx_sdhci_realize;
- dc->reset = npcm7xx_sdhci_reset;
+ device_class_set_legacy_reset(dc, npcm7xx_sdhci_reset);
dc->vmsd = &vmstate_npcm7xx_sdhci;
}
@@ -514,7 +514,7 @@ static void pl181_class_init(ObjectClass *klass, void *data)
DeviceClass *k = DEVICE_CLASS(klass);
k->vmsd = &vmstate_pl181;
- k->reset = pl181_reset;
+ device_class_set_legacy_reset(k, pl181_reset);
/* Reason: output IRQs should be wired up */
k->user_creatable = false;
}
@@ -564,7 +564,7 @@ static void pxa2xx_mmci_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_pxa2xx_mmci;
- dc->reset = pxa2xx_mmci_reset;
+ device_class_set_legacy_reset(dc, pxa2xx_mmci_reset);
}
static void pxa2xx_mmci_bus_class_init(ObjectClass *klass, void *data)
@@ -2819,7 +2819,7 @@ static void sdmmc_common_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, sdmmc_common_properties);
dc->vmsd = &sd_vmstate;
- dc->reset = sd_reset;
+ device_class_set_legacy_reset(dc, sd_reset);
dc->bus_type = TYPE_SD_BUS;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
@@ -1520,7 +1520,7 @@ void sdhci_common_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->vmsd = &sdhci_vmstate;
- dc->reset = sdhci_poweron_reset;
+ device_class_set_legacy_reset(dc, sdhci_poweron_reset);
}
/* --- qdev SysBus --- */
@@ -398,7 +398,7 @@ static void ssi_sd_class_init(ObjectClass *klass, void *data)
k->transfer = ssi_sd_transfer;
k->cs_polarity = SSI_CS_LOW;
dc->vmsd = &vmstate_ssi_sd;
- dc->reset = ssi_sd_reset;
+ device_class_set_legacy_reset(dc, ssi_sd_reset);
/* Reason: GPIO chip-select line should be wired up */
dc->user_creatable = false;
}
@@ -205,7 +205,7 @@ static void dps310_class_init(ObjectClass *klass, void *data)
k->event = dps310_event;
k->recv = dps310_rx;
k->send = dps310_tx;
- dc->reset = dps310_reset;
+ device_class_set_legacy_reset(dc, dps310_reset);
dc->vmsd = &vmstate_dps310;
}
@@ -270,7 +270,7 @@ static void emc141x_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
- dc->reset = emc141x_reset;
+ device_class_set_legacy_reset(dc, emc141x_reset);
k->event = emc141x_event;
k->recv = emc141x_rx;
k->send = emc141x_tx;
@@ -535,7 +535,7 @@ static void lsm303dlhc_mag_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
- dc->reset = lsm303dlhc_mag_reset;
+ device_class_set_legacy_reset(dc, lsm303dlhc_mag_reset);
dc->vmsd = &vmstate_lsm303dlhc_mag;
k->event = lsm303dlhc_mag_event;
k->recv = lsm303dlhc_mag_recv;
@@ -377,7 +377,7 @@ static void iommu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = iommu_reset;
+ device_class_set_legacy_reset(dc, iommu_reset);
dc->vmsd = &vmstate_iommu;
device_class_set_props(dc, iommu_properties);
}
@@ -309,7 +309,7 @@ static void iommu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = iommu_reset;
+ device_class_set_legacy_reset(dc, iommu_reset);
}
static const TypeInfo iommu_info = {
@@ -1284,7 +1284,7 @@ static void aspeed_smc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_smc_realize;
- dc->reset = aspeed_smc_reset;
+ device_class_set_legacy_reset(dc, aspeed_smc_reset);
device_class_set_props(dc, aspeed_smc_properties);
dc->vmsd = &vmstate_aspeed_smc;
}
@@ -268,7 +268,7 @@ static void bcm2835_spi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = bcm2835_spi_reset;
+ device_class_set_legacy_reset(dc, bcm2835_spi_reset);
dc->realize = bcm2835_spi_realize;
dc->vmsd = &vmstate_bcm2835_spi;
}
@@ -628,7 +628,7 @@ static void ibex_spi_host_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = ibex_spi_host_realize;
- dc->reset = ibex_spi_host_reset;
+ device_class_set_legacy_reset(dc, ibex_spi_host_reset);
dc->vmsd = &vmstate_ibex;
device_class_set_props(dc, ibex_spi_properties);
}
@@ -481,7 +481,7 @@ static void imx_spi_class_init(ObjectClass *klass, void *data)
dc->realize = imx_spi_realize;
dc->vmsd = &vmstate_imx_spi;
- dc->reset = imx_spi_reset;
+ device_class_set_legacy_reset(dc, imx_spi_reset);
dc->desc = "i.MX SPI Controller";
}
@@ -403,7 +403,7 @@ static void mss_spi_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mss_spi_realize;
- dc->reset = mss_spi_reset;
+ device_class_set_legacy_reset(dc, mss_spi_reset);
dc->vmsd = &vmstate_mss_spi;
}
@@ -296,7 +296,7 @@ static void pl022_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = pl022_reset;
+ device_class_set_legacy_reset(dc, pl022_reset);
dc->vmsd = &vmstate_pl022;
dc->realize = pl022_realize;
}
@@ -1245,7 +1245,7 @@ static void pnv_spi_class_init(ObjectClass *klass, void *data)
dc->desc = "PowerNV SPI";
dc->realize = pnv_spi_realize;
- dc->reset = do_reset;
+ device_class_set_legacy_reset(dc, do_reset);
device_class_set_props(dc, pnv_spi_properties);
}
@@ -338,7 +338,7 @@ static void sifive_spi_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_props(dc, sifive_spi_properties);
- dc->reset = sifive_spi_reset;
+ device_class_set_legacy_reset(dc, sifive_spi_reset);
dc->realize = sifive_spi_realize;
}
@@ -206,7 +206,7 @@ static void stm32f2xx_spi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f2xx_spi_reset;
+ device_class_set_legacy_reset(dc, stm32f2xx_spi_reset);
dc->vmsd = &vmstate_stm32f2xx_spi;
}
@@ -371,7 +371,7 @@ static void xilinx_spi_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = xilinx_spi_realize;
- dc->reset = xlx_spi_reset;
+ device_class_set_legacy_reset(dc, xlx_spi_reset);
device_class_set_props(dc, xilinx_spi_properties);
dc->vmsd = &vmstate_xilinx_spi;
}
@@ -1448,7 +1448,7 @@ static void xilinx_spips_class_init(ObjectClass *klass, void *data)
XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xilinx_spips_realize;
- dc->reset = xilinx_spips_reset;
+ device_class_set_legacy_reset(dc, xilinx_spips_reset);
device_class_set_props(dc, xilinx_spips_properties);
dc->vmsd = &vmstate_xilinx_spips;
@@ -1464,7 +1464,7 @@ static void xlnx_zynqmp_qspips_class_init(ObjectClass *klass, void * data)
XilinxSPIPSClass *xsc = XILINX_SPIPS_CLASS(klass);
dc->realize = xlnx_zynqmp_qspips_realize;
- dc->reset = xlnx_zynqmp_qspips_reset;
+ device_class_set_legacy_reset(dc, xlnx_zynqmp_qspips_reset);
dc->vmsd = &vmstate_xlnx_zynqmp_qspips;
device_class_set_props(dc, xilinx_zynqmp_qspips_properties);
xsc->reg_ops = &xlnx_zynqmp_qspips_ops;
@@ -1836,7 +1836,7 @@ static void xlnx_versal_ospi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xlnx_versal_ospi_reset;
+ device_class_set_legacy_reset(dc, xlnx_versal_ospi_reset);
dc->realize = xlnx_versal_ospi_realize;
dc->vmsd = &vmstate_xlnx_versal_ospi;
device_class_set_props(dc, xlnx_versal_ospi_properties);
@@ -384,7 +384,7 @@ static void a9_gtimer_class_init(ObjectClass *klass, void *data)
dc->realize = a9_gtimer_realize;
dc->vmsd = &vmstate_a9_gtimer;
- dc->reset = a9_gtimer_reset;
+ device_class_set_legacy_reset(dc, a9_gtimer_reset);
device_class_set_props(dc, a9_gtimer_properties);
}
@@ -293,7 +293,7 @@ static void a10_pit_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = a10_pit_reset;
+ device_class_set_legacy_reset(dc, a10_pit_reset);
device_class_set_props(dc, a10_pit_properties);
dc->desc = "allwinner a10 timer";
dc->vmsd = &vmstate_a10_pit;
@@ -311,7 +311,7 @@ static void arm_mptimer_class_init(ObjectClass *klass, void *data)
dc->realize = arm_mptimer_realize;
dc->vmsd = &vmstate_arm_mptimer;
- dc->reset = arm_mptimer_reset;
+ device_class_set_legacy_reset(dc, arm_mptimer_reset);
device_class_set_props(dc, arm_mptimer_properties);
}
@@ -290,7 +290,7 @@ static void systick_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_systick;
- dc->reset = systick_reset;
+ device_class_set_legacy_reset(dc, systick_reset);
dc->realize = systick_realize;
}
@@ -682,7 +682,7 @@ static void timer_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = aspeed_timer_realize;
- dc->reset = aspeed_timer_reset;
+ device_class_set_legacy_reset(dc, aspeed_timer_reset);
dc->desc = "ASPEED Timer";
dc->vmsd = &vmstate_aspeed_timer_state;
device_class_set_props(dc, aspeed_timer_properties);
@@ -600,7 +600,7 @@ static void avr_timer16_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = avr_timer16_reset;
+ device_class_set_legacy_reset(dc, avr_timer16_reset);
dc->realize = avr_timer16_realize;
device_class_set_props(dc, avr_timer16_properties);
}
@@ -159,7 +159,7 @@ static void bcm2835_systmr_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = bcm2835_systmr_realize;
- dc->reset = bcm2835_systmr_reset;
+ device_class_set_legacy_reset(dc, bcm2835_systmr_reset);
dc->vmsd = &bcm2835_systmr_vmstate;
}
@@ -540,7 +540,7 @@ static void cmsdk_apb_dualtimer_class_init(ObjectClass *klass, void *data)
dc->realize = cmsdk_apb_dualtimer_realize;
dc->vmsd = &cmsdk_apb_dualtimer_vmstate;
- dc->reset = cmsdk_apb_dualtimer_reset;
+ device_class_set_legacy_reset(dc, cmsdk_apb_dualtimer_reset);
}
static const TypeInfo cmsdk_apb_dualtimer_info = {
@@ -267,7 +267,7 @@ static void cmsdk_apb_timer_class_init(ObjectClass *klass, void *data)
dc->realize = cmsdk_apb_timer_realize;
dc->vmsd = &cmsdk_apb_timer_vmstate;
- dc->reset = cmsdk_apb_timer_reset;
+ device_class_set_legacy_reset(dc, cmsdk_apb_timer_reset);
}
static const TypeInfo cmsdk_apb_timer_info = {
@@ -165,7 +165,7 @@ static void digic_timer_class_init(ObjectClass *klass, void *class_data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = digic_timer_reset;
+ device_class_set_legacy_reset(dc, digic_timer_reset);
dc->vmsd = &vmstate_digic_timer;
}
@@ -1550,7 +1550,7 @@ static void exynos4210_mct_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_mct_reset;
+ device_class_set_legacy_reset(dc, exynos4210_mct_reset);
dc->vmsd = &vmstate_exynos4210_mct_state;
}
@@ -424,7 +424,7 @@ static void exynos4210_pwm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = exynos4210_pwm_reset;
+ device_class_set_legacy_reset(dc, exynos4210_pwm_reset);
dc->vmsd = &vmstate_exynos4210_pwm_state;
}
@@ -415,7 +415,7 @@ static void grlib_gptimer_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = grlib_gptimer_realize;
- dc->reset = grlib_gptimer_reset;
+ device_class_set_legacy_reset(dc, grlib_gptimer_reset);
device_class_set_props(dc, grlib_gptimer_properties);
}
@@ -758,7 +758,7 @@ static void hpet_device_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = hpet_realize;
- dc->reset = hpet_reset;
+ device_class_set_legacy_reset(dc, hpet_reset);
dc->vmsd = &vmstate_hpet;
device_class_set_props(dc, hpet_device_properties);
}
@@ -360,7 +360,7 @@ static void pit_class_initfn(ObjectClass *klass, void *data)
k->set_channel_gate = pit_set_channel_gate;
k->get_channel_info = pit_get_channel_info_common;
k->post_load = pit_post_load;
- dc->reset = pit_reset;
+ device_class_set_legacy_reset(dc, pit_reset);
}
static const TypeInfo pit_info = {
@@ -291,7 +291,7 @@ static void ibex_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = ibex_timer_reset;
+ device_class_set_legacy_reset(dc, ibex_timer_reset);
dc->vmsd = &vmstate_ibex_timer;
dc->realize = ibex_timer_realize;
device_class_set_props(dc, ibex_timer_properties);
@@ -432,7 +432,7 @@ static void imx_epit_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_epit_realize;
- dc->reset = imx_epit_dev_reset;
+ device_class_set_legacy_reset(dc, imx_epit_dev_reset);
dc->vmsd = &vmstate_imx_timer_epit;
dc->desc = "i.MX periodic timer";
}
@@ -524,7 +524,7 @@ static void imx_gpt_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = imx_gpt_realize;
- dc->reset = imx_gpt_reset;
+ device_class_set_legacy_reset(dc, imx_gpt_reset);
dc->vmsd = &vmstate_imx_timer_gpt;
dc->desc = "i.MX general timer";
}
@@ -388,7 +388,7 @@ static void nrf51_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = nrf51_timer_reset;
+ device_class_set_legacy_reset(dc, nrf51_timer_reset);
dc->vmsd = &vmstate_nrf51_timer;
device_class_set_props(dc, nrf51_timer_properties);
}
@@ -263,7 +263,7 @@ static void rcmt_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_rcmt;
- dc->reset = rcmt_reset;
+ device_class_set_legacy_reset(dc, rcmt_reset);
device_class_set_props(dc, rcmt_properties);
}
@@ -473,7 +473,7 @@ static void rtmr_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_rtmr;
- dc->reset = rtmr_reset;
+ device_class_set_legacy_reset(dc, rtmr_reset);
device_class_set_props(dc, rtmr_properties);
}
@@ -446,7 +446,7 @@ static void sifive_pwm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = sifive_pwm_reset;
+ device_class_set_legacy_reset(dc, sifive_pwm_reset);
device_class_set_props(dc, sifive_pwm_properties);
dc->vmsd = &vmstate_sifive_pwm;
dc->realize = sifive_pwm_realize;
@@ -429,7 +429,7 @@ static void slavio_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = slavio_timer_reset;
+ device_class_set_legacy_reset(dc, slavio_timer_reset);
dc->vmsd = &vmstate_slavio_timer;
device_class_set_props(dc, slavio_timer_properties);
}
@@ -454,7 +454,7 @@ static void sse_counter_class_init(ObjectClass *klass, void *data)
dc->realize = sse_counter_realize;
dc->vmsd = &sse_counter_vmstate;
- dc->reset = sse_counter_reset;
+ device_class_set_legacy_reset(dc, sse_counter_reset);
}
static const TypeInfo sse_counter_info = {
@@ -451,7 +451,7 @@ static void sse_timer_class_init(ObjectClass *klass, void *data)
dc->realize = sse_timer_realize;
dc->vmsd = &sse_timer_vmstate;
- dc->reset = sse_timer_reset;
+ device_class_set_legacy_reset(dc, sse_timer_reset);
device_class_set_props(dc, sse_timer_properties);
}
@@ -325,7 +325,7 @@ static void stm32f2xx_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = stm32f2xx_timer_reset;
+ device_class_set_legacy_reset(dc, stm32f2xx_timer_reset);
device_class_set_props(dc, stm32f2xx_timer_properties);
dc->vmsd = &vmstate_stm32f2xx_timer;
dc->realize = stm32f2xx_timer_realize;
@@ -538,7 +538,7 @@ static void tpm_tis_i2c_class_init(ObjectClass *klass, void *data)
TPMIfClass *tc = TPM_IF_CLASS(klass);
dc->realize = tpm_tis_i2c_realizefn;
- dc->reset = tpm_tis_i2c_reset;
+ device_class_set_legacy_reset(dc, tpm_tis_i2c_reset);
dc->vmsd = &vmstate_tpm_tis_i2c;
device_class_set_props(dc, tpm_tis_i2c_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
@@ -177,7 +177,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_tpm_tis_isa;
tc->model = TPM_MODEL_TPM_TIS;
dc->realize = tpm_tis_isa_realizefn;
- dc->reset = tpm_tis_isa_reset;
+ device_class_set_legacy_reset(dc, tpm_tis_isa_reset);
tc->request_completed = tpm_tis_isa_request_completed;
tc->get_version = tpm_tis_isa_get_tpm_version;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
@@ -135,7 +135,7 @@ static void tpm_tis_sysbus_class_init(ObjectClass *klass, void *data)
tc->model = TPM_MODEL_TPM_TIS;
dc->realize = tpm_tis_sysbus_realizefn;
dc->user_creatable = true;
- dc->reset = tpm_tis_sysbus_reset;
+ device_class_set_legacy_reset(dc, tpm_tis_sysbus_reset);
tc->request_completed = tpm_tis_sysbus_request_completed;
tc->get_version = tpm_tis_sysbus_get_tpm_version;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
@@ -67,7 +67,7 @@ static void tricore_testdevice_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_props(dc, tricore_testdevice_properties);
- dc->reset = tricore_testdevice_reset;
+ device_class_set_legacy_reset(dc, tricore_testdevice_reset);
}
static const TypeInfo tricore_testdevice_info = {
@@ -666,7 +666,7 @@ static void usb_dwc3_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = usb_dwc3_reset;
+ device_class_set_legacy_reset(dc, usb_dwc3_reset);
dc->realize = usb_dwc3_realize;
dc->vmsd = &vmstate_usb_dwc3;
device_class_set_props(dc, usb_dwc3_properties);
@@ -162,7 +162,7 @@ static void ehci_class_init(ObjectClass *klass, void *data)
k->config_write = usb_ehci_pci_write_config;
dc->vmsd = &vmstate_ehci_pci;
device_class_set_props(dc, ehci_pci_properties);
- dc->reset = usb_ehci_pci_reset;
+ device_class_set_legacy_reset(dc, usb_ehci_pci_reset);
}
static const TypeInfo ehci_pci_type_info = {
@@ -93,7 +93,7 @@ static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
dc->realize = usb_ehci_sysbus_realize;
dc->vmsd = &vmstate_ehci_sysbus;
device_class_set_props(dc, ehci_sysbus_properties);
- dc->reset = usb_ehci_sysbus_reset;
+ device_class_set_legacy_reset(dc, usb_ehci_sysbus_reset);
set_bit(DEVICE_CATEGORY_USB, dc->categories);
}
@@ -142,7 +142,7 @@ static void ohci_pci_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, ohci_pci_properties);
dc->hotpluggable = false;
dc->vmsd = &vmstate_ohci;
- dc->reset = usb_ohci_reset_pci;
+ device_class_set_legacy_reset(dc, usb_ohci_reset_pci);
}
static const TypeInfo ohci_pci_info = {
@@ -73,7 +73,7 @@ static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_USB, dc->categories);
dc->desc = "OHCI USB Controller";
device_class_set_props(dc, ohci_sysbus_properties);
- dc->reset = ohci_sysbus_reset;
+ device_class_set_legacy_reset(dc, ohci_sysbus_reset);
}
static const TypeInfo ohci_sysbus_types[] = {
@@ -1247,7 +1247,7 @@ static void uhci_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_SERIAL_USB;
dc->vmsd = &vmstate_uhci;
- dc->reset = uhci_reset;
+ device_class_set_legacy_reset(dc, uhci_reset);
set_bit(DEVICE_CATEGORY_USB, dc->categories);
}
@@ -202,7 +202,7 @@ static void xhci_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xhci_pci_reset;
+ device_class_set_legacy_reset(dc, xhci_pci_reset);
dc->vmsd = &vmstate_xhci_pci;
set_bit(DEVICE_CATEGORY_USB, dc->categories);
k->realize = usb_xhci_pci_realize;
@@ -101,7 +101,7 @@ static void xhci_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = xhci_sysbus_reset;
+ device_class_set_legacy_reset(dc, xhci_sysbus_reset);
dc->realize = xhci_sysbus_realize;
dc->vmsd = &vmstate_xhci_sysbus;
device_class_set_props(dc, xhci_sysbus_props);
@@ -3621,7 +3621,7 @@ static void xhci_class_init(ObjectClass *klass, void *data)
dc->realize = usb_xhci_realize;
dc->unrealize = usb_xhci_unrealize;
- dc->reset = xhci_reset;
+ device_class_set_legacy_reset(dc, xhci_reset);
device_class_set_props(dc, xhci_properties);
dc->user_creatable = false;
}
@@ -218,7 +218,7 @@ static void imx_usbphy_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->reset = imx_usbphy_reset;
+ device_class_set_legacy_reset(dc, imx_usbphy_reset);
dc->vmsd = &vmstate_imx_usbphy;
dc->desc = "i.MX USB PHY Module";
dc->realize = imx_usbphy_realize;
@@ -832,7 +832,7 @@ static void tusb6010_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = tusb6010_realize;
- dc->reset = tusb6010_reset;
+ device_class_set_legacy_reset(dc, tusb6010_reset);
}
static const TypeInfo tusb6010_info = {
@@ -256,7 +256,7 @@ static void vfio_ap_class_init(ObjectClass *klass, void *data)
dc->realize = vfio_ap_realize;
dc->unrealize = vfio_ap_unrealize;
dc->hotpluggable = true;
- dc->reset = vfio_ap_reset;
+ device_class_set_legacy_reset(dc, vfio_ap_reset);
dc->bus_type = TYPE_AP_BUS;
}
@@ -711,7 +711,7 @@ static void vfio_ccw_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->realize = vfio_ccw_realize;
dc->unrealize = vfio_ccw_unrealize;
- dc->reset = vfio_ccw_reset;
+ device_class_set_legacy_reset(dc, vfio_ccw_reset);
cdc->handle_request = vfio_ccw_handle_request;
cdc->handle_halt = vfio_ccw_handle_halt;
@@ -3424,7 +3424,7 @@ static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
- dc->reset = vfio_pci_reset;
+ device_class_set_legacy_reset(dc, vfio_pci_reset);
device_class_set_props(dc, vfio_pci_dev_properties);
#ifdef CONFIG_IOMMUFD
object_class_property_add_str(klass, "fd", NULL, vfio_pci_set_fd);
@@ -790,7 +790,7 @@ static void virtio_mmio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = virtio_mmio_realizefn;
- dc->reset = virtio_mmio_reset;
+ device_class_set_legacy_reset(dc, virtio_mmio_reset);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
device_class_set_props(dc, virtio_mmio_properties);
}
@@ -380,7 +380,7 @@ static void cmsdk_apb_watchdog_class_init(ObjectClass *klass, void *data)
dc->realize = cmsdk_apb_watchdog_realize;
dc->vmsd = &cmsdk_apb_watchdog_vmstate;
- dc->reset = cmsdk_apb_watchdog_reset;
+ device_class_set_legacy_reset(dc, cmsdk_apb_watchdog_reset);
}
static const TypeInfo cmsdk_apb_watchdog_info = {
@@ -278,7 +278,7 @@ static void wdt_sbsa_gwdt_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = wdt_sbsa_gwdt_realize;
- dc->reset = wdt_sbsa_gwdt_reset;
+ device_class_set_legacy_reset(dc, wdt_sbsa_gwdt_reset);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
dc->vmsd = &vmstate_sbsa_gwdt;
@@ -300,7 +300,7 @@ static void aspeed_wdt_class_init(ObjectClass *klass, void *data)
dc->desc = "ASPEED Watchdog Controller";
dc->realize = aspeed_wdt_realize;
- dc->reset = aspeed_wdt_reset;
+ device_class_set_legacy_reset(dc, aspeed_wdt_reset);
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
dc->vmsd = &vmstate_aspeed_wdt;
device_class_set_props(dc, aspeed_wdt_properties);
@@ -115,7 +115,7 @@ static void wdt_diag288_class_init(ObjectClass *klass, void *data)
dc->realize = wdt_diag288_realize;
dc->unrealize = wdt_diag288_unrealize;
- dc->reset = wdt_diag288_reset;
+ device_class_set_legacy_reset(dc, wdt_diag288_reset);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
dc->vmsd = &vmstate_diag288;
@@ -469,7 +469,7 @@ static void i6300esb_class_init(ObjectClass *klass, void *data)
k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_ESB_9;
k->class_id = PCI_CLASS_SYSTEM_OTHER;
- dc->reset = i6300esb_reset;
+ device_class_set_legacy_reset(dc, i6300esb_reset);
dc->vmsd = &vmstate_i6300esb;
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
dc->desc = "Intel 6300ESB";
@@ -133,7 +133,7 @@ static void wdt_ib700_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = wdt_ib700_realize;
- dc->reset = wdt_ib700_reset;
+ device_class_set_legacy_reset(dc, wdt_ib700_reset);
dc->vmsd = &vmstate_ib700;
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
dc->desc = "iBASE 700";
@@ -294,7 +294,7 @@ static void imx2_wdt_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, imx2_wdt_properties);
dc->realize = imx2_wdt_realize;
- dc->reset = imx2_wdt_reset;
+ device_class_set_legacy_reset(dc, imx2_wdt_reset);
dc->vmsd = &vmstate_imx2_wdt;
dc->desc = "i.MX2 watchdog timer";
set_bit(DEVICE_CATEGORY_WATCHDOG, dc->categories);
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/device-reset.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240830145812.1967042-8-peter.maydell@linaro.org --- hw/acpi/erst.c | 2 +- hw/acpi/piix4.c | 2 +- hw/adc/aspeed_adc.c | 2 +- hw/adc/max111x.c | 2 +- hw/adc/stm32f2xx_adc.c | 2 +- hw/adc/zynq-xadc.c | 2 +- hw/arm/armsse.c | 2 +- hw/arm/highbank.c | 2 +- hw/arm/musicpal.c | 6 +++--- hw/arm/pxa2xx.c | 4 ++-- hw/arm/strongarm.c | 4 ++-- hw/audio/ac97.c | 2 +- hw/audio/cs4231.c | 2 +- hw/audio/cs4231a.c | 2 +- hw/audio/es1370.c | 2 +- hw/audio/hda-codec.c | 2 +- hw/audio/intel-hda.c | 2 +- hw/audio/marvell_88w8618.c | 2 +- hw/audio/pl041.c | 2 +- hw/audio/via-ac97.c | 2 +- hw/block/fdc-isa.c | 2 +- hw/block/fdc-sysbus.c | 2 +- hw/block/m25p80.c | 2 +- hw/block/nand.c | 2 +- hw/block/onenand.c | 2 +- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 2 +- hw/block/swim.c | 2 +- hw/char/avr_usart.c | 2 +- hw/char/cmsdk-apb-uart.c | 2 +- hw/char/digic-uart.c | 2 +- hw/char/escc.c | 2 +- hw/char/etraxfs_ser.c | 2 +- hw/char/exynos4210_uart.c | 2 +- hw/char/goldfish_tty.c | 2 +- hw/char/grlib_apbuart.c | 2 +- hw/char/ibex_uart.c | 2 +- hw/char/imx_serial.c | 2 +- hw/char/mcf_uart.c | 2 +- hw/char/mchp_pfsoc_mmuart.c | 2 +- hw/char/nrf51_uart.c | 2 +- hw/char/pl011.c | 2 +- hw/char/renesas_sci.c | 2 +- hw/char/sclpconsole-lm.c | 2 +- hw/char/sclpconsole.c | 2 +- hw/char/sh_serial.c | 2 +- hw/char/shakti_uart.c | 2 +- hw/char/stm32f2xx_usart.c | 2 +- hw/char/xilinx_uartlite.c | 2 +- hw/core/or-irq.c | 2 +- hw/core/qdev.c | 2 +- hw/cxl/switch-mailbox-cci.c | 2 +- hw/display/artist.c | 2 +- hw/display/ati.c | 2 +- hw/display/bcm2835_fb.c | 2 +- hw/display/cg3.c | 2 +- hw/display/dpcd.c | 2 +- hw/display/exynos4210_fimd.c | 2 +- hw/display/g364fb.c | 2 +- hw/display/i2c-ddc.c | 2 +- hw/display/jazz_led.c | 2 +- hw/display/macfb.c | 4 ++-- hw/display/qxl.c | 2 +- hw/display/sii9022.c | 2 +- hw/display/sm501.c | 4 ++-- hw/display/tcx.c | 2 +- hw/display/vga-isa.c | 2 +- hw/display/vga-mmio.c | 2 +- hw/display/vga-pci.c | 2 +- hw/display/vmware_vga.c | 2 +- hw/display/xlnx_dp.c | 2 +- hw/dma/bcm2835_dma.c | 2 +- hw/dma/i8257.c | 2 +- hw/dma/pl080.c | 2 +- hw/dma/pl330.c | 2 +- hw/dma/rc4030.c | 2 +- hw/dma/sparc32_dma.c | 2 +- hw/dma/xilinx_axidma.c | 2 +- hw/dma/xlnx-zdma.c | 2 +- hw/dma/xlnx-zynq-devcfg.c | 2 +- hw/dma/xlnx_csu_dma.c | 2 +- hw/dma/xlnx_dpdma.c | 2 +- hw/fsi/aspeed_apb2opb.c | 2 +- hw/fsi/fsi-master.c | 2 +- hw/fsi/fsi.c | 2 +- hw/fsi/lbus.c | 2 +- hw/gpio/aspeed_gpio.c | 2 +- hw/gpio/bcm2835_gpio.c | 2 +- hw/gpio/bcm2838_gpio.c | 2 +- hw/gpio/gpio_key.c | 2 +- hw/gpio/imx_gpio.c | 2 +- hw/gpio/max7310.c | 2 +- hw/gpio/mpc8xxx.c | 2 +- hw/gpio/nrf51_gpio.c | 2 +- hw/gpio/omap_gpio.c | 4 ++-- hw/gpio/pca9552.c | 2 +- hw/gpio/pca9554.c | 2 +- hw/gpio/pcf8574.c | 2 +- hw/gpio/sifive_gpio.c | 2 +- hw/hyperv/hyperv.c | 2 +- hw/hyperv/vmbus.c | 2 +- hw/i2c/aspeed_i2c.c | 4 ++-- hw/i2c/bcm2835_i2c.c | 2 +- hw/i2c/exynos4210_i2c.c | 2 +- hw/i2c/imx_i2c.c | 2 +- hw/i2c/microbit_i2c.c | 2 +- hw/i2c/mpc_i2c.c | 2 +- hw/i2c/omap_i2c.c | 2 +- hw/i2c/ppc4xx_i2c.c | 2 +- hw/i2c/smbus_eeprom.c | 2 +- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/kvm/i8254.c | 2 +- hw/i386/kvm/i8259.c | 2 +- hw/i386/kvm/ioapic.c | 2 +- hw/i386/kvm/xen_overlay.c | 2 +- hw/i386/port92.c | 2 +- hw/i386/vapic.c | 2 +- hw/i386/vmmouse.c | 2 +- hw/i386/xen/xen_platform.c | 2 +- hw/ide/ahci.c | 2 +- hw/ide/cmd646.c | 2 +- hw/ide/ich.c | 2 +- hw/ide/isa.c | 2 +- hw/ide/macio.c | 2 +- hw/ide/microdrive.c | 2 +- hw/ide/mmio.c | 2 +- hw/ide/piix.c | 4 ++-- hw/ide/sii3112.c | 2 +- hw/ide/via.c | 2 +- hw/input/adb-kbd.c | 2 +- hw/input/adb-mouse.c | 2 +- hw/input/lm832x.c | 2 +- hw/input/pckbd.c | 4 ++-- hw/intc/allwinner-a10-pic.c | 2 +- hw/intc/apic_common.c | 2 +- hw/intc/armv7m_nvic.c | 2 +- hw/intc/aspeed_intc.c | 2 +- hw/intc/aspeed_vic.c | 2 +- hw/intc/bcm2835_ic.c | 2 +- hw/intc/bcm2836_control.c | 2 +- hw/intc/exynos4210_combiner.c | 2 +- hw/intc/goldfish_pic.c | 2 +- hw/intc/grlib_irqmp.c | 2 +- hw/intc/heathrow_pic.c | 2 +- hw/intc/i8259.c | 2 +- hw/intc/imx_avic.c | 2 +- hw/intc/imx_gpcv2.c | 2 +- hw/intc/ioapic.c | 2 +- hw/intc/loongarch_extioi.c | 2 +- hw/intc/loongarch_pch_pic.c | 2 +- hw/intc/m68k_irqc.c | 2 +- hw/intc/omap_intc.c | 4 ++-- hw/intc/openpic.c | 2 +- hw/intc/openpic_kvm.c | 2 +- hw/intc/pl190.c | 2 +- hw/intc/ppc-uic.c | 2 +- hw/intc/s390_flic.c | 2 +- hw/intc/s390_flic_kvm.c | 2 +- hw/intc/sifive_plic.c | 2 +- hw/intc/slavio_intctl.c | 2 +- hw/intc/xlnx-pmu-iomod-intc.c | 2 +- hw/intc/xlnx-zynqmp-ipi.c | 2 +- hw/isa/lpc_ich9.c | 2 +- hw/isa/pc87312.c | 2 +- hw/isa/piix.c | 2 +- hw/isa/vt82c686.c | 10 +++++----- hw/m68k/mcf5206.c | 2 +- hw/m68k/mcf_intc.c | 2 +- hw/m68k/next-cube.c | 2 +- hw/m68k/next-kbd.c | 2 +- hw/mem/cxl_type3.c | 2 +- hw/misc/a9scu.c | 2 +- hw/misc/allwinner-cpucfg.c | 2 +- hw/misc/allwinner-h3-ccu.c | 2 +- hw/misc/allwinner-h3-dramc.c | 2 +- hw/misc/allwinner-h3-sysctrl.c | 2 +- hw/misc/allwinner-r40-ccu.c | 2 +- hw/misc/allwinner-r40-dramc.c | 2 +- hw/misc/allwinner-sid.c | 2 +- hw/misc/allwinner-sramc.c | 2 +- hw/misc/applesmc.c | 2 +- hw/misc/arm_l2x0.c | 2 +- hw/misc/arm_sysctl.c | 2 +- hw/misc/armsse-cpu-pwrctrl.c | 2 +- hw/misc/armsse-mhu.c | 2 +- hw/misc/aspeed_hace.c | 2 +- hw/misc/aspeed_i3c.c | 4 ++-- hw/misc/aspeed_lpc.c | 2 +- hw/misc/aspeed_peci.c | 2 +- hw/misc/aspeed_sbc.c | 2 +- hw/misc/aspeed_scu.c | 10 +++++----- hw/misc/aspeed_sdmc.c | 4 ++-- hw/misc/aspeed_xdma.c | 2 +- hw/misc/avr_power.c | 2 +- hw/misc/bcm2835_cprman.c | 8 ++++---- hw/misc/bcm2835_mbox.c | 2 +- hw/misc/bcm2835_mphi.c | 2 +- hw/misc/bcm2835_powermgt.c | 2 +- hw/misc/bcm2835_rng.c | 2 +- hw/misc/bcm2835_thermal.c | 2 +- hw/misc/eccmemctl.c | 2 +- hw/misc/exynos4210_clk.c | 2 +- hw/misc/exynos4210_pmu.c | 2 +- hw/misc/exynos4210_rng.c | 2 +- hw/misc/imx25_ccm.c | 2 +- hw/misc/imx31_ccm.c | 2 +- hw/misc/imx6_ccm.c | 2 +- hw/misc/imx6_src.c | 2 +- hw/misc/imx6ul_ccm.c | 2 +- hw/misc/imx7_ccm.c | 4 ++-- hw/misc/imx7_snvs.c | 2 +- hw/misc/imx7_src.c | 2 +- hw/misc/imx_rngc.c | 2 +- hw/misc/iotkit-secctl.c | 2 +- hw/misc/iotkit-sysctl.c | 2 +- hw/misc/ivshmem.c | 2 +- hw/misc/lasi.c | 2 +- hw/misc/led.c | 2 +- hw/misc/macio/cuda.c | 2 +- hw/misc/macio/gpio.c | 2 +- hw/misc/macio/mac_dbdma.c | 2 +- hw/misc/macio/pmu.c | 2 +- hw/misc/mips_cmgcr.c | 2 +- hw/misc/mips_cpc.c | 2 +- hw/misc/mips_itu.c | 2 +- hw/misc/mps2-fpgaio.c | 2 +- hw/misc/mps2-scc.c | 2 +- hw/misc/msf2-sysreg.c | 2 +- hw/misc/nrf51_rng.c | 2 +- hw/misc/pci-testdev.c | 2 +- hw/misc/sifive_e_aon.c | 2 +- hw/misc/sifive_u_prci.c | 2 +- hw/misc/slavio_misc.c | 2 +- hw/misc/stm32f2xx_syscfg.c | 2 +- hw/misc/stm32f4xx_exti.c | 2 +- hw/misc/stm32f4xx_syscfg.c | 2 +- hw/misc/tz-mpc.c | 2 +- hw/misc/tz-msc.c | 2 +- hw/misc/tz-ppc.c | 2 +- hw/misc/virt_ctrl.c | 2 +- hw/misc/xlnx-versal-cfu.c | 2 +- hw/net/allwinner-sun8i-emac.c | 2 +- hw/net/allwinner_emac.c | 2 +- hw/net/cadence_gem.c | 2 +- hw/net/can/can_kvaser_pci.c | 2 +- hw/net/can/can_mioe3680_pci.c | 2 +- hw/net/can/can_pcm3680_pci.c | 2 +- hw/net/can/ctucan_pci.c | 2 +- hw/net/can/xlnx-versal-canfd.c | 2 +- hw/net/dp8393x.c | 2 +- hw/net/etraxfs_eth.c | 2 +- hw/net/fsl_etsec/etsec.c | 2 +- hw/net/ftgmac100.c | 4 ++-- hw/net/imx_fec.c | 2 +- hw/net/lan9118.c | 2 +- hw/net/lance.c | 2 +- hw/net/lasi_i82596.c | 2 +- hw/net/mcf_fec.c | 2 +- hw/net/mipsnet.c | 2 +- hw/net/msf2-emac.c | 2 +- hw/net/npcm7xx_emc.c | 2 +- hw/net/npcm_gmac.c | 2 +- hw/net/opencores_eth.c | 2 +- hw/net/pcnet-pci.c | 2 +- hw/net/rocker/rocker.c | 2 +- hw/net/rtl8139.c | 2 +- hw/net/smc91c111.c | 2 +- hw/net/stellaris_enet.c | 2 +- hw/net/sungem.c | 2 +- hw/net/sunhme.c | 2 +- hw/net/tulip.c | 2 +- hw/net/vmxnet3.c | 2 +- hw/net/xilinx_axienet.c | 2 +- hw/net/xilinx_ethlite.c | 2 +- hw/nvme/ctrl.c | 2 +- hw/nvram/eeprom_at24c.c | 2 +- hw/nvram/fw_cfg.c | 2 +- hw/nvram/mac_nvram.c | 2 +- hw/nvram/nrf51_nvm.c | 2 +- hw/pci-bridge/cxl_downstream.c | 2 +- hw/pci-bridge/cxl_upstream.c | 2 +- hw/pci-bridge/i82801b11.c | 2 +- hw/pci-bridge/pci_bridge_dev.c | 2 +- hw/pci-bridge/pci_expander_bridge.c | 2 +- hw/pci-bridge/pcie_pci_bridge.c | 2 +- hw/pci-bridge/simba.c | 2 +- hw/pci-bridge/xio3130_downstream.c | 2 +- hw/pci-bridge/xio3130_upstream.c | 2 +- hw/pci-host/astro.c | 4 ++-- hw/pci-host/designware.c | 2 +- hw/pci-host/dino.c | 2 +- hw/pci-host/gt64120.c | 2 +- hw/pci-host/mv64361.c | 2 +- hw/pci-host/ppc440_pcix.c | 2 +- hw/pci-host/q35.c | 2 +- hw/pci-host/sabre.c | 2 +- hw/pci-host/versatile.c | 2 +- hw/pci-host/xilinx-pcie.c | 2 +- hw/ppc/pnv_psi.c | 4 ++-- hw/ppc/ppc405_boards.c | 2 +- hw/ppc/ppc405_uc.c | 12 ++++++------ hw/ppc/ppc4xx_devs.c | 6 +++--- hw/ppc/ppc4xx_sdram.c | 4 ++-- hw/ppc/ppce500_spin.c | 2 +- hw/ppc/spapr_cpu_core.c | 2 +- hw/ppc/spapr_iommu.c | 2 +- hw/ppc/spapr_pci.c | 2 +- hw/ppc/spapr_vio.c | 2 +- hw/remote/proxy.c | 2 +- hw/rtc/allwinner-rtc.c | 2 +- hw/rtc/aspeed_rtc.c | 2 +- hw/rtc/ds1338.c | 2 +- hw/rtc/exynos4210_rtc.c | 2 +- hw/rtc/goldfish_rtc.c | 2 +- hw/rtc/ls7a_rtc.c | 2 +- hw/rtc/m48t59-isa.c | 2 +- hw/rtc/m48t59.c | 2 +- hw/rtc/xlnx-zynqmp-rtc.c | 2 +- hw/s390x/event-facility.c | 2 +- hw/s390x/ipl.c | 2 +- hw/s390x/s390-pci-bus.c | 4 ++-- hw/s390x/sclpquiesce.c | 2 +- hw/scsi/esp-pci.c | 2 +- hw/scsi/esp.c | 2 +- hw/scsi/lsi53c895a.c | 2 +- hw/scsi/megasas.c | 2 +- hw/scsi/mptsas.c | 2 +- hw/scsi/scsi-disk.c | 2 +- hw/scsi/scsi-generic.c | 2 +- hw/scsi/vmw_pvscsi.c | 2 +- hw/sd/allwinner-sdhost.c | 2 +- hw/sd/aspeed_sdhci.c | 2 +- hw/sd/bcm2835_sdhost.c | 2 +- hw/sd/cadence_sdhci.c | 2 +- hw/sd/npcm7xx_sdhci.c | 2 +- hw/sd/pl181.c | 2 +- hw/sd/pxa2xx_mmci.c | 2 +- hw/sd/sd.c | 2 +- hw/sd/sdhci.c | 2 +- hw/sd/ssi-sd.c | 2 +- hw/sensor/dps310.c | 2 +- hw/sensor/emc141x.c | 2 +- hw/sensor/lsm303dlhc_mag.c | 2 +- hw/sparc/sun4m_iommu.c | 2 +- hw/sparc64/sun4u_iommu.c | 2 +- hw/ssi/aspeed_smc.c | 2 +- hw/ssi/bcm2835_spi.c | 2 +- hw/ssi/ibex_spi_host.c | 2 +- hw/ssi/imx_spi.c | 2 +- hw/ssi/mss-spi.c | 2 +- hw/ssi/pl022.c | 2 +- hw/ssi/pnv_spi.c | 2 +- hw/ssi/sifive_spi.c | 2 +- hw/ssi/stm32f2xx_spi.c | 2 +- hw/ssi/xilinx_spi.c | 2 +- hw/ssi/xilinx_spips.c | 4 ++-- hw/ssi/xlnx-versal-ospi.c | 2 +- hw/timer/a9gtimer.c | 2 +- hw/timer/allwinner-a10-pit.c | 2 +- hw/timer/arm_mptimer.c | 2 +- hw/timer/armv7m_systick.c | 2 +- hw/timer/aspeed_timer.c | 2 +- hw/timer/avr_timer16.c | 2 +- hw/timer/bcm2835_systmr.c | 2 +- hw/timer/cmsdk-apb-dualtimer.c | 2 +- hw/timer/cmsdk-apb-timer.c | 2 +- hw/timer/digic-timer.c | 2 +- hw/timer/exynos4210_mct.c | 2 +- hw/timer/exynos4210_pwm.c | 2 +- hw/timer/grlib_gptimer.c | 2 +- hw/timer/hpet.c | 2 +- hw/timer/i8254.c | 2 +- hw/timer/ibex_timer.c | 2 +- hw/timer/imx_epit.c | 2 +- hw/timer/imx_gpt.c | 2 +- hw/timer/nrf51_timer.c | 2 +- hw/timer/renesas_cmt.c | 2 +- hw/timer/renesas_tmr.c | 2 +- hw/timer/sifive_pwm.c | 2 +- hw/timer/slavio_timer.c | 2 +- hw/timer/sse-counter.c | 2 +- hw/timer/sse-timer.c | 2 +- hw/timer/stm32f2xx_timer.c | 2 +- hw/tpm/tpm_tis_i2c.c | 2 +- hw/tpm/tpm_tis_isa.c | 2 +- hw/tpm/tpm_tis_sysbus.c | 2 +- hw/tricore/tricore_testdevice.c | 2 +- hw/usb/hcd-dwc3.c | 2 +- hw/usb/hcd-ehci-pci.c | 2 +- hw/usb/hcd-ehci-sysbus.c | 2 +- hw/usb/hcd-ohci-pci.c | 2 +- hw/usb/hcd-ohci-sysbus.c | 2 +- hw/usb/hcd-uhci.c | 2 +- hw/usb/hcd-xhci-pci.c | 2 +- hw/usb/hcd-xhci-sysbus.c | 2 +- hw/usb/hcd-xhci.c | 2 +- hw/usb/imx-usb-phy.c | 2 +- hw/usb/tusb6010.c | 2 +- hw/vfio/ap.c | 2 +- hw/vfio/ccw.c | 2 +- hw/vfio/pci.c | 2 +- hw/virtio/virtio-mmio.c | 2 +- hw/watchdog/cmsdk-apb-watchdog.c | 2 +- hw/watchdog/sbsa_gwdt.c | 2 +- hw/watchdog/wdt_aspeed.c | 2 +- hw/watchdog/wdt_diag288.c | 2 +- hw/watchdog/wdt_i6300esb.c | 2 +- hw/watchdog/wdt_ib700.c | 2 +- hw/watchdog/wdt_imx2.c | 2 +- 410 files changed, 448 insertions(+), 448 deletions(-)