Message ID | 20240916143116.169693-5-santosh.shukla@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Interrupt Remap support for emulated amd viommu | expand |
In subject: s/invaldate/invalidate/ On 9/16/24 10:31, Santosh Shukla wrote: > From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > > In order to support AMD IOMMU interrupt remapping emulation with PCI > pass-through devices, QEMU needs to notify VFIO when guest IOMMU driver > updates and invalidate the guest interrupt remapping table (IRT), and > communicate information so that the host IOMMU driver can update > the shadowed interrupt remapping table in the host IOMMU. > > Therefore, send notification when guet s/guet/guest Alejandro IOMMU emulates the IRT invalidation > commands. > > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > Signed-off-by: Santosh Shukla <santosh.shukla@amd.com> > --- > hw/i386/amd_iommu.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c > index 24fcd561345c..9095146525e6 100644 > --- a/hw/i386/amd_iommu.c > +++ b/hw/i386/amd_iommu.c > @@ -431,6 +431,12 @@ static void amdvi_complete_ppr(AMDVIState *s, uint64_t *cmd) > trace_amdvi_ppr_exec(); > } > > +static void amdvi_intremap_inval_notify_all(AMDVIState *s, bool global, > + uint32_t index, uint32_t mask) > +{ > + x86_iommu_iec_notify_all(X86_IOMMU_DEVICE(s), global, index, mask); > +} > + > static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) > { > if (extract64(cmd[0], 0, 60) || cmd[1]) { > @@ -438,6 +444,9 @@ static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) > s->cmdbuf + s->cmdbuf_head); > } > > + /* Notify global invalidation */ > + amdvi_intremap_inval_notify_all(s, true, 0, 0); > + > amdvi_iotlb_reset(s); > trace_amdvi_all_inval(); > } > @@ -486,6 +495,9 @@ static void amdvi_inval_inttable(AMDVIState *s, uint64_t *cmd) > return; > } > > + /* Notify global invalidation */ > + amdvi_intremap_inval_notify_all(s, true, 0, 0); > + > trace_amdvi_intr_inval(); > } >
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote: > In subject: > s/invaldate/invalidate/ > > On 9/16/24 10:31, Santosh Shukla wrote: >> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> >> >> In order to support AMD IOMMU interrupt remapping emulation with PCI >> pass-through devices, QEMU needs to notify VFIO when guest IOMMU driver >> updates and invalidate the guest interrupt remapping table (IRT), and >> communicate information so that the host IOMMU driver can update >> the shadowed interrupt remapping table in the host IOMMU. >> >> Therefore, send notification when guet > > s/guet/guest > > Alejandro V3. Thanks > > IOMMU emulates the IRT invalidation >> commands. >> >> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> >> Signed-off-by: Santosh Shukla <santosh.shukla@amd.com> >> --- >> hw/i386/amd_iommu.c | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> >> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c >> index 24fcd561345c..9095146525e6 100644 >> --- a/hw/i386/amd_iommu.c >> +++ b/hw/i386/amd_iommu.c >> @@ -431,6 +431,12 @@ static void amdvi_complete_ppr(AMDVIState *s, uint64_t *cmd) >> trace_amdvi_ppr_exec(); >> } >> +static void amdvi_intremap_inval_notify_all(AMDVIState *s, bool global, >> + uint32_t index, uint32_t mask) >> +{ >> + x86_iommu_iec_notify_all(X86_IOMMU_DEVICE(s), global, index, mask); >> +} >> + >> static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) >> { >> if (extract64(cmd[0], 0, 60) || cmd[1]) { >> @@ -438,6 +444,9 @@ static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) >> s->cmdbuf + s->cmdbuf_head); >> } >> + /* Notify global invalidation */ >> + amdvi_intremap_inval_notify_all(s, true, 0, 0); >> + >> amdvi_iotlb_reset(s); >> trace_amdvi_all_inval(); >> } >> @@ -486,6 +495,9 @@ static void amdvi_inval_inttable(AMDVIState *s, uint64_t *cmd) >> return; >> } >> + /* Notify global invalidation */ >> + amdvi_intremap_inval_notify_all(s, true, 0, 0); >> + >> trace_amdvi_intr_inval(); >> } >>
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 24fcd561345c..9095146525e6 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -431,6 +431,12 @@ static void amdvi_complete_ppr(AMDVIState *s, uint64_t *cmd) trace_amdvi_ppr_exec(); } +static void amdvi_intremap_inval_notify_all(AMDVIState *s, bool global, + uint32_t index, uint32_t mask) +{ + x86_iommu_iec_notify_all(X86_IOMMU_DEVICE(s), global, index, mask); +} + static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) { if (extract64(cmd[0], 0, 60) || cmd[1]) { @@ -438,6 +444,9 @@ static void amdvi_inval_all(AMDVIState *s, uint64_t *cmd) s->cmdbuf + s->cmdbuf_head); } + /* Notify global invalidation */ + amdvi_intremap_inval_notify_all(s, true, 0, 0); + amdvi_iotlb_reset(s); trace_amdvi_all_inval(); } @@ -486,6 +495,9 @@ static void amdvi_inval_inttable(AMDVIState *s, uint64_t *cmd) return; } + /* Notify global invalidation */ + amdvi_intremap_inval_notify_all(s, true, 0, 0); + trace_amdvi_intr_inval(); }