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[190.5.140.142]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4d37ec3d0aasm1507302173.84.2024.09.16.08.09.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2024 08:09:02 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Cc: sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org, peter.maydell@linaro.org, alex.bennee@linaro.org, edgar.iglesias@amd.com, xen-devel@lists.xenproject.org, "Edgar E. Iglesias" , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum , qemu-arm@nongnu.org Subject: [PATCH v1 2/4] hw/xen: xenpvh: Disable buffered IOREQs for ARM Date: Mon, 16 Sep 2024 17:08:50 +0200 Message-ID: <20240916150853.1216703-3-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240916150853.1216703-1-edgar.iglesias@gmail.com> References: <20240916150853.1216703-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::12b; envelope-from=edgar.iglesias@gmail.com; helo=mail-il1-x12b.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: "Edgar E. Iglesias" Add a way to enable/disable buffered IOREQs for PVH machines and disable them for ARM. ARM does not support buffered IOREQ's nor the legacy way to map IOREQ info pages. See the following for more details: https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=2fbd7e609e1803ac5e5c26e22aa8e4b5a6cddbb1 https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/ioreq.c;h=2e829d2e7f3760401b96fa7c930e2015fb1cf463;hb=HEAD#l138 Signed-off-by: Edgar E. Iglesias --- hw/arm/xen-pvh.c | 3 +++ hw/i386/xen/xen-pvh.c | 3 +++ hw/xen/xen-pvh-common.c | 2 +- include/hw/xen/xen-pvh-common.h | 3 +++ 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c index 04cb9855af..28af3910ea 100644 --- a/hw/arm/xen-pvh.c +++ b/hw/arm/xen-pvh.c @@ -66,6 +66,9 @@ static void xen_arm_machine_class_init(ObjectClass *oc, void *data) */ mc->max_cpus = GUEST_MAX_VCPUS; + /* Xen/ARM does not use buffered IOREQs. */ + xpc->handle_bufioreq = HVM_IOREQSRV_BUFIOREQ_OFF; + /* List of supported features known to work on PVH ARM. */ xpc->has_tpm = true; xpc->has_virtio_mmio = true; diff --git a/hw/i386/xen/xen-pvh.c b/hw/i386/xen/xen-pvh.c index 45645667e9..f1f02d3311 100644 --- a/hw/i386/xen/xen-pvh.c +++ b/hw/i386/xen/xen-pvh.c @@ -89,6 +89,9 @@ static void xen_pvh_machine_class_init(ObjectClass *oc, void *data) /* We have an implementation specific init to create CPU objects. */ xpc->init = xen_pvh_init; + /* Enable buffered IOREQs. */ + xpc->handle_bufioreq = HVM_IOREQSRV_BUFIOREQ_ATOMIC; + /* * PCI INTX routing. * diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c index 08641fdcec..76a9b2b945 100644 --- a/hw/xen/xen-pvh-common.c +++ b/hw/xen/xen-pvh-common.c @@ -195,7 +195,7 @@ static void xen_pvh_init(MachineState *ms) xen_pvh_init_ram(s, sysmem); xen_register_ioreq(&s->ioreq, ms->smp.max_cpus, - HVM_IOREQSRV_BUFIOREQ_ATOMIC, + xpc->handle_bufioreq, &xen_memory_listener); if (s->cfg.virtio_mmio_num) { diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-common.h index bc09eea936..62c44a1ce7 100644 --- a/include/hw/xen/xen-pvh-common.h +++ b/include/hw/xen/xen-pvh-common.h @@ -43,6 +43,9 @@ struct XenPVHMachineClass { */ int (*set_pci_link_route)(uint8_t line, uint8_t irq); + /* Allow implementations to optionally enable buffered ioreqs. */ + int handle_bufioreq; + /* * Each implementation can optionally enable features that it * supports and are known to work.