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[190.5.140.142]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-3a092e9005csm16897935ab.79.2024.09.16.08.09.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Sep 2024 08:09:08 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Cc: sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org, peter.maydell@linaro.org, alex.bennee@linaro.org, edgar.iglesias@amd.com, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org Subject: [PATCH v1 4/4] hw/arm: xenpvh: Enable PCI for ARM PVH Date: Mon, 16 Sep 2024 17:08:52 +0200 Message-ID: <20240916150853.1216703-5-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240916150853.1216703-1-edgar.iglesias@gmail.com> References: <20240916150853.1216703-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::136; envelope-from=edgar.iglesias@gmail.com; helo=mail-il1-x136.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: "Edgar E. Iglesias" Enable PCI support for the ARM Xen PVH machine. Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini --- hw/arm/xen-pvh.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c index 28af3910ea..33f0dd5982 100644 --- a/hw/arm/xen-pvh.c +++ b/hw/arm/xen-pvh.c @@ -39,6 +39,16 @@ static void xen_arm_instance_init(Object *obj) VIRTIO_MMIO_DEV_SIZE }; } +static void xen_pvh_set_pci_intx_irq(void *opaque, int intx_irq, int level) +{ + XenPVHMachineState *s = XEN_PVH_MACHINE(opaque); + int irq = s->cfg.pci_intx_irq_base + intx_irq; + + if (xendevicemodel_set_irq_level(xen_dmod, xen_domid, irq, level)) { + error_report("xendevicemodel_set_pci_intx_level failed"); + } +} + static void xen_arm_machine_class_init(ObjectClass *oc, void *data) { XenPVHMachineClass *xpc = XEN_PVH_MACHINE_CLASS(oc); @@ -69,7 +79,11 @@ static void xen_arm_machine_class_init(ObjectClass *oc, void *data) /* Xen/ARM does not use buffered IOREQs. */ xpc->handle_bufioreq = HVM_IOREQSRV_BUFIOREQ_OFF; + /* PCI INTX delivery. */ + xpc->set_pci_intx_irq = xen_pvh_set_pci_intx_irq; + /* List of supported features known to work on PVH ARM. */ + xpc->has_pci = true; xpc->has_tpm = true; xpc->has_virtio_mmio = true;