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Wed, 18 Sep 2024 12:23:23 -0700 (PDT) Date: Wed, 18 Sep 2024 12:22:43 -0700 In-Reply-To: <20240918192254.3136903-1-tavip@google.com> Mime-Version: 1.0 References: <20240918192254.3136903-1-tavip@google.com> X-Mailer: git-send-email 2.46.0.662.g92d0881bb0-goog Message-ID: <20240918192254.3136903-16-tavip@google.com> Subject: [PATCH 15/25] tests/qtest: add register access macros and functions From: Octavian Purdila To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, stefanst@google.com, pbonzini@redhat.com, peter.maydell@linaro.org, marcandre.lureau@redhat.com, berrange@redhat.com, eduardo@habkost.net, luc@lmichel.fr, damien.hedde@dahe.fr, alistair@alistair23.me, thuth@redhat.com, philmd@linaro.org, jsnow@redhat.com, crosa@redhat.com, lvivier@redhat.com Received-SPF: pass client-ip=2607:f8b0:4864:20::449; envelope-from=3qyjrZgUKCuYbIdQXOWWOTM.KWUYMUc-LMdMTVWVOVc.WZO@flex--tavip.bounces.google.com; helo=mail-pf1-x449.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add utility macros for accessing register or register bit fields in tests, e.g.: REG32_WRITE(FLEXCOMM, PSELID, persel); g_assert(REG32_READ_FIELD(FLEXCOMM, PSELID, PERSEL) == persel); Signed-off-by: Octavian Purdila --- tests/qtest/reg-utils.h | 70 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 tests/qtest/reg-utils.h diff --git a/tests/qtest/reg-utils.h b/tests/qtest/reg-utils.h new file mode 100644 index 0000000000..e09aaf3333 --- /dev/null +++ b/tests/qtest/reg-utils.h @@ -0,0 +1,70 @@ +/* + * Register access utilities for device tests. + * + * Copyright (C) 2024 Google LLC + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#ifndef _REG_UTILS_H +#define _REG_UTILS_H + +#include "libqtest-single.h" +#include "hw/registerfields.h" + +#ifdef DEBUG_REG +#define debug(fmt, args...) fprintf(stderr, fmt, ## args) +#else +#define debug(fmt, args...) +#endif + +#define _REG_OFF(mod, reg) (A_##mod##_##reg) + +#define REG32_READ(mod, reg) \ + ({ \ + uint32_t value; \ + value = readl(mod##_BASE + _REG_OFF(mod, reg)); \ + debug("[%s] -> %08x\n", #reg, value); \ + value; \ + }) + +#define REG32_WRITE(mod, reg, value) \ + do { \ + debug("[%s] <- %08x\n", #reg, value); \ + writel(mod##_BASE + _REG_OFF(mod, reg), value); \ + } while (0) + +#define REG_FIELD_VAL(v, mod, reg, field) \ + FIELD_EX32(v, mod##_##reg, field) \ + +#define REG32_READ_FIELD(mod, reg, field) \ + REG_FIELD_VAL(REG32_READ(mod, reg), mod, reg, field) + +#define REG32_WRITE_FIELD(mod, reg, field, val) \ + do { \ + uint32_t _tmp = REG32_READ(mod, reg); \ + _tmp = FIELD_DP32(_tmp, mod##_##reg, field, val); \ + REG32_WRITE(mod, reg, _tmp); \ + } while (0) + +#define REG32_WRITE_FIELD_NOUPDATE(mod, reg, field, val) \ + do { \ + uint32_t _tmp = FIELD_DP32(0, mod##_##reg, field, val); \ + REG32_WRITE(mod, reg, _tmp); \ + } while (0) + +#define WAIT_REG32_FIELD(ns, mod, reg, field, val) \ + do { \ + clock_step(ns); \ + g_assert_cmpuint(REG32_READ_FIELD(mod, reg, field), ==, val); \ + } while (0) + +#define REG32_READ_FAIL(mod, reg) \ + readl_fail(mod##_BASE + _REG_OFF(mod, reg)) + +#define REG32_WRITE_FAIL(mod, reg, value) \ + writel_fail(mod##_BASE + _REG_OFF(mod, reg), value) + +#endif /* _REG_UTILS_H */