[16/25] system/qtest: add APIS to check for memory access failures

Message ID	20240918192254.3136903-17-tavip@google.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> Date: Wed, 18 Sep 2024 12:22:44 -0700 In-Reply-To: <20240918192254.3136903-1-tavip@google.com> Mime-Version: 1.0 References: <20240918192254.3136903-1-tavip@google.com> Message-ID: <20240918192254.3136903-17-tavip@google.com> Subject: [PATCH 16/25] system/qtest: add APIS to check for memory access failures From: Octavian Purdila <tavip@google.com> To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, stefanst@google.com, pbonzini@redhat.com, peter.maydell@linaro.org, marcandre.lureau@redhat.com, berrange@redhat.com, eduardo@habkost.net, luc@lmichel.fr, damien.hedde@dahe.fr, alistair@alistair23.me, thuth@redhat.com, philmd@linaro.org, jsnow@redhat.com, crosa@redhat.com, lvivier@redhat.com Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::549; envelope-from=3rSjrZgUKCugdKfSZQYYQVO.MYWaOWe-NOfOVXYXQXe.YbQ@flex--tavip.bounces.google.com; helo=mail-pg1-x549.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org
Series	NXP i.MX RT595 \| expand [00/25] NXP i.MX RT595 [01/25] fifo32: add peek function [02/25] tests/unit: add fifo32 tests [03/25] scripts: add script to generate C header files from SVD XML files [04/25] Add mcux-soc-svd subproject [05/25] hw/misc: add support for flexcomm [06/25] hw/misc/flexcomm.c: add common fifo functionality [07/25] hw/char: add support for flexcomm usart [08/25] hw/i2c: add support for flexcomm i2c [09/25] hw/ssi: add support for flexcomm spi [10/25] hw/misc: add support for RT500's clock controller [11/25] hw/ssi: add support for flexspi [12/25] hw/misc: add support for RT500's reset controller [13/25] hw/arm: add basic support for the RT500 SoC [14/25] hw/arm: add RT595-EVK board [15/25] tests/qtest: add register access macros and functions [16/25] system/qtest: add APIS to check for memory access failures [17/25] tests/qtest: add flexcomm tests [18/25] tests/qtest: add flexcomm usart tests [19/25] hw/misc: add i2c-tester [20/25] tests/qtest: add tests for flexcomm i2c [21/25] hw/ssi: allow NULL realize callbacks for peripherals [22/25] hw/misc: add spi-tester [23/25] tests/qtest: add tests for flexcomm spi [24/25] systems/qtest: add device clock APIs [25/25] tests/qtest: add tests for RT500's clock controller

diff --git a/tests/qtest/libqtest-single.h b/tests/qtest/libqtest-single.h index 851724cbcb..c22037c8b2 100644 --- a/tests/qtest/libqtest-single.h +++ b/tests/qtest/libqtest-single.h @@ -265,6 +265,98 @@ static inline uint64_t readq(uint64_t addr) return qtest_readq(global_qtest, addr); } +/** + * writeb_fail: + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes an 8-bit value to memory expecting a failure. + */ +static inline void writeb_fail(uint64_t addr, uint8_t value) +{ + qtest_writeb_fail(global_qtest, addr, value); +} + +/** + * writew_fail: + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 16-bit value to memory expecting a failure. + */ +static inline void writew_fail(uint64_t addr, uint16_t value) +{ + qtest_writew_fail(global_qtest, addr, value); +} + +/** + * writel_fail: + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 32-bit value to memory expecting a failure. + */ +static inline void writel_fail(uint64_t addr, uint32_t value) +{ + qtest_writel_fail(global_qtest, addr, value); +} + +/** + * writeq_fail: + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 64-bit value to memory expecting a failure. + */ +static inline void writeq_fail(uint64_t addr, uint64_t value) +{ + qtest_writeq_fail(global_qtest, addr, value); +} + +/** + * readb_fail: + * @addr: Guest address to read from. + * + * Reads an 8-bit value from memory expecting a failure. + */ +static inline void readb_fail(uint64_t addr) +{ + qtest_readb_fail(global_qtest, addr); +} + +/** + * readw_fail: + * @addr: Guest address to read from. + * + * Reads a 16-bit value from memory expecting a failure. + */ +static inline void readw_fail(uint64_t addr) +{ + qtest_readw_fail(global_qtest, addr); +} + +/** + * readl_fail: + * @addr: Guest address to read from. + * + * Reads a 32-bit value from memory expecting a failure. + */ +static inline void readl_fail(uint64_t addr) +{ + qtest_readl_fail(global_qtest, addr); +} + +/** + * readq_fail: + * @addr: Guest address to read from. + * + * Reads a 64-bit value from memory expecting a failure. + */ +static inline void readq_fail(uint64_t addr) +{ + qtest_readq_fail(global_qtest, addr); +} + /** * memread: * @addr: Guest address to read from. diff --git a/tests/qtest/libqtest.h b/tests/qtest/libqtest.h index beb96b18eb..f9bbeb2e60 100644 --- a/tests/qtest/libqtest.h +++ b/tests/qtest/libqtest.h @@ -549,6 +549,82 @@ uint32_t qtest_readl(QTestState *s, uint64_t addr); */ uint64_t qtest_readq(QTestState *s, uint64_t addr); +/** + * qtest_writeb_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes an 8-bit value to memory expecting a failure. + */ +void qtest_writeb_fail(QTestState *s, uint64_t addr, uint8_t value); + +/** + * qtest_writew_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 16-bit value to memory expecting a failure. + */ +void qtest_writew_fail(QTestState *s, uint64_t addr, uint16_t value); + +/** + * qtest_writel_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 32-bit value to memory expecting a failure. + */ +void qtest_writel_fail(QTestState *s, uint64_t addr, uint32_t value); + +/** + * qtest_writeq_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to write to. + * @value: Value being written. + * + * Writes a 64-bit value to memory expecting a failure. + */ +void qtest_writeq_fail(QTestState *s, uint64_t addr, uint64_t value); + +/** + * qtest_readb_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to read from. + * + * Reads an 8-bit value from memory expecting a failure. + */ +void qtest_readb_fail(QTestState *s, uint64_t addr); + +/** + * qtest_readw_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to read from. + * + * Reads a 16-bit value from memory expecting a failure. + */ +void qtest_readw_fail(QTestState *s, uint64_t addr); + +/** + * qtest_readl_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to read from. + * + * Reads a 32-bit value from memory expecting a failure. + */ +void qtest_readl_fail(QTestState *s, uint64_t addr); + +/** + * qtest_readq_fail: + * @s: #QTestState instance to operate on. + * @addr: Guest address to read from. + * + * Reads a 64-bit value from memory expecting a failure. + */ +void qtest_readq_fail(QTestState *s, uint64_t addr); + /** * qtest_memread: * @s: #QTestState instance to operate on. diff --git a/system/qtest.c b/system/qtest.c index 12703a2045..95bb80a2bc 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -514,26 +514,30 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][5] == 'b') { uint8_t data = value; - address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1); + ret = address_space_write(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 1); } else if (words[0][5] == 'w') { uint16_t data = value; tswap16s(&data); - address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2); + ret = address_space_write(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 2); } else if (words[0][5] == 'l') { uint32_t data = value; tswap32s(&data); - address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4); + ret = address_space_write(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 4); } else if (words[0][5] == 'q') { uint64_t data = value; tswap64s(&data); - address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 8); + ret = address_space_write(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 8); } qtest_send_prefix(chr); - qtest_send(chr, "OK\n"); + if (ret == MEMTX_OK) { + qtest_send(chr, "OK\n"); + } else { + qtest_send(chr, "FAIL\n"); + } } else if (strcmp(words[0], "readb") == 0 || strcmp(words[0], "readw") == 0 || strcmp(words[0], "readl") == 0 || @@ -548,26 +552,30 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][4] == 'b') { uint8_t data; - address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1); + ret = address_space_read(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 1); value = data; } else if (words[0][4] == 'w') { uint16_t data; - address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2); + ret = address_space_read(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 2); value = tswap16(data); } else if (words[0][4] == 'l') { uint32_t data; - address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4); + ret = address_space_read(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &data, 4); value = tswap32(data); } else if (words[0][4] == 'q') { - address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &value, 8); + ret = address_space_read(first_cpu->as, addr, + MEMTXATTRS_UNSPECIFIED, &value, 8); tswap64s(&value); } qtest_send_prefix(chr); - qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value); + if (ret == MEMTX_OK) { + qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value); + } else { + qtest_sendf(chr, "FAIL\n"); + } } else if (strcmp(words[0], "read") == 0) { g_autoptr(GString) enc = NULL; uint64_t addr, len; diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index 9d07de1fbd..4055d6b953 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c @@ -666,7 +666,7 @@ static GString *qtest_client_socket_recv_line(QTestState *s) return line; } -static gchar **qtest_rsp_args(QTestState *s, int expected_args) +static gchar **_qtest_rsp_args(QTestState *s, int expected_args, bool fail) { GString *line; gchar **words; @@ -700,7 +700,11 @@ redo: } g_assert(words[0] != NULL); - g_assert_cmpstr(words[0], ==, "OK"); + if (fail) { + g_assert_cmpstr(words[0], ==, "FAIL"); + } else { + g_assert_cmpstr(words[0], ==, "OK"); + } for (i = 0; i < expected_args; i++) { g_assert(words[i] != NULL); @@ -709,6 +713,11 @@ redo: return words; } +static gchar **qtest_rsp_args(QTestState *s, int expected_args) +{ + return _qtest_rsp_args(s, expected_args, false); +} + static void qtest_rsp(QTestState *s) { gchar **words = qtest_rsp_args(s, 0); @@ -716,6 +725,13 @@ static void qtest_rsp(QTestState *s) g_strfreev(words); } +static void qtest_rsp_fail(QTestState *s) +{ + gchar **words = _qtest_rsp_args(s, 0, true); + + g_strfreev(words); +} + static int qtest_query_target_endianness(QTestState *s) { gchar **args; @@ -1103,6 +1119,13 @@ static void qtest_write(QTestState *s, const char *cmd, uint64_t addr, qtest_rsp(s); } +static void qtest_write_fail(QTestState *s, const char *cmd, uint64_t addr, + uint64_t value) +{ + qtest_sendf(s, "%s 0x%" PRIx64 " 0x%" PRIx64 "\n", cmd, addr, value); + qtest_rsp_fail(s); +} + void qtest_writeb(QTestState *s, uint64_t addr, uint8_t value) { qtest_write(s, "writeb", addr, value); @@ -1123,6 +1146,26 @@ void qtest_writeq(QTestState *s, uint64_t addr, uint64_t value) qtest_write(s, "writeq", addr, value); } +void qtest_writeb_fail(QTestState *s, uint64_t addr, uint8_t value) +{ + qtest_write_fail(s, "writeb", addr, value); +} + +void qtest_writew_fail(QTestState *s, uint64_t addr, uint16_t value) +{ + qtest_write_fail(s, "writew", addr, value); +} + +void qtest_writel_fail(QTestState *s, uint64_t addr, uint32_t value) +{ + qtest_write_fail(s, "writel", addr, value); +} + +void qtest_writeq_fail(QTestState *s, uint64_t addr, uint64_t value) +{ + qtest_write_fail(s, "writeq", addr, value); +} + static uint64_t qtest_read(QTestState *s, const char *cmd, uint64_t addr) { gchar **args; @@ -1138,6 +1181,12 @@ static uint64_t qtest_read(QTestState *s, const char *cmd, uint64_t addr) return value; } +static void qtest_read_fail(QTestState *s, const char *cmd, uint64_t addr) +{ + qtest_sendf(s, "%s 0x%" PRIx64 "\n", cmd, addr); + qtest_rsp_fail(s); +} + uint8_t qtest_readb(QTestState *s, uint64_t addr) { return qtest_read(s, "readb", addr); @@ -1158,6 +1207,26 @@ uint64_t qtest_readq(QTestState *s, uint64_t addr) return qtest_read(s, "readq", addr); } +void qtest_readb_fail(QTestState *s, uint64_t addr) +{ + qtest_read_fail(s, "readb", addr); +} + +void qtest_readw_fail(QTestState *s, uint64_t addr) +{ + qtest_read_fail(s, "readw", addr); +} + +void qtest_readl_fail(QTestState *s, uint64_t addr) +{ + qtest_read_fail(s, "readl", addr); +} + +void qtest_readq_fail(QTestState *s, uint64_t addr) +{ + qtest_read(s, "readq", addr); +} + static int hex2nib(char ch) { if (ch >= '0' && ch <= '9') {

[16/25] system/qtest: add APIS to check for memory access failures

Commit Message

Patch