| Message ID | 20240924112035.1320865-1-Shivasagar.Myana@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/1] hw/ssi/xilinx_spips: Fix flash earse assert in dual parallel configuration | expand |
Hi Shiva, On the subject: s/earse/erase/ On Tue, Sep 24, 2024 at 04:50:35PM +0530, Shiva sagar Myana wrote: > Ensure that the FIFO is checked for emptiness before popping data from it. > Previously, the code directly popped the data from FIFO without checking, which I'm not native english speaking but I think "from the FIFO" sounds better to me! > could cause an assertion failure: > ../util/fifo8.c:67: fifo8_pop: Assertion `fifo->num > 0 > > Signed-off-by: Shiva sagar Myana <Shivasagar.Myana@amd.com> With above changes: Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Best regards, Francisco > --- > hw/ssi/xilinx_spips.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c > index 71952a410d..adaf404f54 100644 > --- a/hw/ssi/xilinx_spips.c > +++ b/hw/ssi/xilinx_spips.c > @@ -620,7 +620,9 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) > } else if (s->snoop_state == SNOOP_STRIPING || > s->snoop_state == SNOOP_NONE) { > for (i = 0; i < num_effective_busses(s); ++i) { > - tx_rx[i] = fifo8_pop(&s->tx_fifo); > + if (!fifo8_is_empty(&s->tx_fifo)) { > + tx_rx[i] = fifo8_pop(&s->tx_fifo); > + } > } > stripe8(tx_rx, num_effective_busses(s), false); > } else if (s->snoop_state >= SNOOP_ADDR) { > -- > 2.34.1 >
On Mon, 30 Sept 2024 at 13:38, Francisco Iglesias <francisco.iglesias@amd.com> wrote: > > Hi Shiva, > > On the subject: > > s/earse/erase/ > > On Tue, Sep 24, 2024 at 04:50:35PM +0530, Shiva sagar Myana wrote: > > Ensure that the FIFO is checked for emptiness before popping data from it. > > Previously, the code directly popped the data from FIFO without checking, which > > I'm not native english speaking but I think "from the FIFO" sounds better to me! > > > could cause an assertion failure: > > ../util/fifo8.c:67: fifo8_pop: Assertion `fifo->num > 0 > > > > Signed-off-by: Shiva sagar Myana <Shivasagar.Myana@amd.com> > > With above changes: > > Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Applied to target-arm.next, thanks (with the above commit message tweaks made, and restoring the truncated tail end of the assertion message). -- PMM
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 71952a410d..adaf404f54 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -620,7 +620,9 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) } else if (s->snoop_state == SNOOP_STRIPING || s->snoop_state == SNOOP_NONE) { for (i = 0; i < num_effective_busses(s); ++i) { - tx_rx[i] = fifo8_pop(&s->tx_fifo); + if (!fifo8_is_empty(&s->tx_fifo)) { + tx_rx[i] = fifo8_pop(&s->tx_fifo); + } } stripe8(tx_rx, num_effective_busses(s), false); } else if (s->snoop_state >= SNOOP_ADDR) {
Ensure that the FIFO is checked for emptiness before popping data from it. Previously, the code directly popped the data from FIFO without checking, which could cause an assertion failure: ../util/fifo8.c:67: fifo8_pop: Assertion `fifo->num > 0 Signed-off-by: Shiva sagar Myana <Shivasagar.Myana@amd.com> --- hw/ssi/xilinx_spips.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)