| Message ID | 20240927083351.2637798-7-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support GPIO for AST2700 | expand |
Hello Jamin, On 9/27/24 10:33, Jamin Lin wrote: > The register set of GPIO have a significant change since AST2700. > Each GPIO pin has their own individual control register and users are able to > set one GPIO pin’s direction, interrupt enable, input mask and so on in the > same one control register. > > AST2700 does not have GPIO18_XXX registers for GPIO 1.8v, removes > ASPEED_DEV_GPIO_1_8V. It is enough to only have ASPEED_DEV_GPIO > device in AST2700. > > Add GPIO model for AST2700 GPIO support. The GPIO controller registers base > address is start at 0x14C0_B000 and its address space is 0x1000. > > The AST2700 GPIO controller interrupt is connected to GICINT130_INTC at > bit 18. Therefore, correct GPIO irq 130. I would prefer 2 patches. One for the IRQ number fix and one for "Support GPIO for AST2700" Thanks, C. > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> > --- > hw/arm/aspeed_ast27x0.c | 18 +++++++++++++++--- > 1 file changed, 15 insertions(+), 3 deletions(-) > > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c > index 761ee11657..dca660eb6b 100644 > --- a/hw/arm/aspeed_ast27x0.c > +++ b/hw/arm/aspeed_ast27x0.c > @@ -62,6 +62,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { > [ASPEED_GIC_REDIST] = 0x12280000, > [ASPEED_DEV_ADC] = 0x14C00000, > [ASPEED_DEV_I2C] = 0x14C0F000, > + [ASPEED_DEV_GPIO] = 0x14C0B000, > }; > > #define AST2700_MAX_IRQ 288 > @@ -87,8 +88,7 @@ static const int aspeed_soc_ast2700_irqmap[] = { > [ASPEED_DEV_ADC] = 130, > [ASPEED_DEV_XDMA] = 5, > [ASPEED_DEV_EMMC] = 15, > - [ASPEED_DEV_GPIO] = 11, > - [ASPEED_DEV_GPIO_1_8V] = 130, > + [ASPEED_DEV_GPIO] = 130, > [ASPEED_DEV_RTC] = 13, > [ASPEED_DEV_TIMER1] = 16, > [ASPEED_DEV_TIMER2] = 17, > @@ -124,7 +124,7 @@ static const int aspeed_soc_ast2700_gic128_intcmap[] = { > static const int aspeed_soc_ast2700_gic130_intcmap[] = { > [ASPEED_DEV_I2C] = 0, > [ASPEED_DEV_ADC] = 16, > - [ASPEED_DEV_GPIO_1_8V] = 18, > + [ASPEED_DEV_GPIO] = 18, > }; > > /* GICINT 131 */ > @@ -373,6 +373,9 @@ static void aspeed_soc_ast2700_init(Object *obj) > > snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); > object_initialize_child(obj, "i2c", &s->i2c, typename); > + > + snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); > + object_initialize_child(obj, "gpio", &s->gpio, typename); > } > > /* > @@ -658,6 +661,15 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) > sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq); > } > > + /* GPIO */ > + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { > + return; > + } > + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, > + sc->memmap[ASPEED_DEV_GPIO]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, > + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); > + > create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000); > create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000); > create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
Hi Cedric, > Subject: Re: [PATCH v5 6/7] aspeed/soc: Support GPIO for AST2700 and correct > irq 130 > > Hello Jamin, > > On 9/27/24 10:33, Jamin Lin wrote: > > The register set of GPIO have a significant change since AST2700. > > Each GPIO pin has their own individual control register and users are > > able to set one GPIO pin’s direction, interrupt enable, input mask and > > so on in the same one control register. > > > > AST2700 does not have GPIO18_XXX registers for GPIO 1.8v, removes > > ASPEED_DEV_GPIO_1_8V. It is enough to only have ASPEED_DEV_GPIO > device > > in AST2700. > > > > Add GPIO model for AST2700 GPIO support. The GPIO controller registers > > base address is start at 0x14C0_B000 and its address space is 0x1000. > > > > The AST2700 GPIO controller interrupt is connected to GICINT130_INTC > > at bit 18. Therefore, correct GPIO irq 130. > > I would prefer 2 patches. One for the IRQ number fix and one for "Support > GPIO for AST2700" > Thanks for suggestion. Will fix Jamin > Thanks, > > C. > > > > > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> > > --- > > hw/arm/aspeed_ast27x0.c | 18 +++++++++++++++--- > > 1 file changed, 15 insertions(+), 3 deletions(-) > > > > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index > > 761ee11657..dca660eb6b 100644 > > --- a/hw/arm/aspeed_ast27x0.c > > +++ b/hw/arm/aspeed_ast27x0.c > > @@ -62,6 +62,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = > { > > [ASPEED_GIC_REDIST] = 0x12280000, > > [ASPEED_DEV_ADC] = 0x14C00000, > > [ASPEED_DEV_I2C] = 0x14C0F000, > > + [ASPEED_DEV_GPIO] = 0x14C0B000, > > }; > > > > #define AST2700_MAX_IRQ 288 > > @@ -87,8 +88,7 @@ static const int aspeed_soc_ast2700_irqmap[] = { > > [ASPEED_DEV_ADC] = 130, > > [ASPEED_DEV_XDMA] = 5, > > [ASPEED_DEV_EMMC] = 15, > > - [ASPEED_DEV_GPIO] = 11, > > - [ASPEED_DEV_GPIO_1_8V] = 130, > > + [ASPEED_DEV_GPIO] = 130, > > [ASPEED_DEV_RTC] = 13, > > [ASPEED_DEV_TIMER1] = 16, > > [ASPEED_DEV_TIMER2] = 17, > > @@ -124,7 +124,7 @@ static const int > aspeed_soc_ast2700_gic128_intcmap[] = { > > static const int aspeed_soc_ast2700_gic130_intcmap[] = { > > [ASPEED_DEV_I2C] = 0, > > [ASPEED_DEV_ADC] = 16, > > - [ASPEED_DEV_GPIO_1_8V] = 18, > > + [ASPEED_DEV_GPIO] = 18, > > }; > > > > /* GICINT 131 */ > > @@ -373,6 +373,9 @@ static void aspeed_soc_ast2700_init(Object *obj) > > > > snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); > > object_initialize_child(obj, "i2c", &s->i2c, typename); > > + > > + snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); > > + object_initialize_child(obj, "gpio", &s->gpio, typename); > > } > > > > /* > > @@ -658,6 +661,15 @@ static void > aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) > > sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq); > > } > > > > + /* GPIO */ > > + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { > > + return; > > + } > > + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, > > + sc->memmap[ASPEED_DEV_GPIO]); > > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, > > + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); > > + > > create_unimplemented_device("ast2700.dpmcu", 0x11000000, > 0x40000); > > create_unimplemented_device("ast2700.iomem0", 0x12000000, > 0x01000000); > > create_unimplemented_device("ast2700.iomem1", 0x14000000, > > 0x01000000);
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 761ee11657..dca660eb6b 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -62,6 +62,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { [ASPEED_GIC_REDIST] = 0x12280000, [ASPEED_DEV_ADC] = 0x14C00000, [ASPEED_DEV_I2C] = 0x14C0F000, + [ASPEED_DEV_GPIO] = 0x14C0B000, }; #define AST2700_MAX_IRQ 288 @@ -87,8 +88,7 @@ static const int aspeed_soc_ast2700_irqmap[] = { [ASPEED_DEV_ADC] = 130, [ASPEED_DEV_XDMA] = 5, [ASPEED_DEV_EMMC] = 15, - [ASPEED_DEV_GPIO] = 11, - [ASPEED_DEV_GPIO_1_8V] = 130, + [ASPEED_DEV_GPIO] = 130, [ASPEED_DEV_RTC] = 13, [ASPEED_DEV_TIMER1] = 16, [ASPEED_DEV_TIMER2] = 17, @@ -124,7 +124,7 @@ static const int aspeed_soc_ast2700_gic128_intcmap[] = { static const int aspeed_soc_ast2700_gic130_intcmap[] = { [ASPEED_DEV_I2C] = 0, [ASPEED_DEV_ADC] = 16, - [ASPEED_DEV_GPIO_1_8V] = 18, + [ASPEED_DEV_GPIO] = 18, }; /* GICINT 131 */ @@ -373,6 +373,9 @@ static void aspeed_soc_ast2700_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); object_initialize_child(obj, "i2c", &s->i2c, typename); + + snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); + object_initialize_child(obj, "gpio", &s->gpio, typename); } /* @@ -658,6 +661,15 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq); } + /* GPIO */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, + sc->memmap[ASPEED_DEV_GPIO]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, + aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000); create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000); create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
The register set of GPIO have a significant change since AST2700. Each GPIO pin has their own individual control register and users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in the same one control register. AST2700 does not have GPIO18_XXX registers for GPIO 1.8v, removes ASPEED_DEV_GPIO_1_8V. It is enough to only have ASPEED_DEV_GPIO device in AST2700. Add GPIO model for AST2700 GPIO support. The GPIO controller registers base address is start at 0x14C0_B000 and its address space is 0x1000. The AST2700 GPIO controller interrupt is connected to GICINT130_INTC at bit 18. Therefore, correct GPIO irq 130. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- hw/arm/aspeed_ast27x0.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)