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Fri, 11 Oct 2024 05:13:20 -0700 (PDT) From: Changqi Lu To: qemu-block@nongnu.org, qemu-devel@nongnu.org Cc: kwolf@redhat.com, hreitz@redhat.com, stefanha@redhat.com, fam@euphon.net, ronniesahlberg@gmail.com, pbonzini@redhat.com, pl@dlhnet.de, kbusch@kernel.org, its@irrelevant.dk, foss@defmacro.it, philmd@linaro.org, pizhenwei@bytedance.com, k.jensen@samsung.com, Changqi Lu Subject: [PATCH v14 06/10] block/nvme: add reservation command protocol constants Date: Fri, 11 Oct 2024 20:12:27 +0800 Message-Id: <20241011121231.18333-7-luchangqi.123@bytedance.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) In-Reply-To: <20241011121231.18333-1-luchangqi.123@bytedance.com> References: <20241011121231.18333-1-luchangqi.123@bytedance.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=luchangqi.123@bytedance.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add constants for the NVMe persistent command protocol. The constants include the reservation command opcode and reservation type values defined in section 7 of the NVMe 2.0 specification. Reviewed-by: Stefan Hajnoczi Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi --- include/block/nvme.h | 61 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/include/block/nvme.h b/include/block/nvme.h index bb231d0b9a..8b125f7769 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -633,7 +633,11 @@ enum NvmeIoCommands { NVME_CMD_WRITE_ZEROES = 0x08, NVME_CMD_DSM = 0x09, NVME_CMD_VERIFY = 0x0c, + NVME_CMD_RESV_REGISTER = 0x0d, + NVME_CMD_RESV_REPORT = 0x0e, + NVME_CMD_RESV_ACQUIRE = 0x11, NVME_CMD_IO_MGMT_RECV = 0x12, + NVME_CMD_RESV_RELEASE = 0x15, NVME_CMD_COPY = 0x19, NVME_CMD_IO_MGMT_SEND = 0x1d, NVME_CMD_ZONE_MGMT_SEND = 0x79, @@ -641,6 +645,63 @@ enum NvmeIoCommands { NVME_CMD_ZONE_APPEND = 0x7d, }; +typedef enum { + NVME_RESV_REGISTER_ACTION_REGISTER = 0x00, + NVME_RESV_REGISTER_ACTION_UNREGISTER = 0x01, + NVME_RESV_REGISTER_ACTION_REPLACE = 0x02, +} NvmeReservationRegisterAction; + +typedef enum { + NVME_RESV_RELEASE_ACTION_RELEASE = 0x00, + NVME_RESV_RELEASE_ACTION_CLEAR = 0x01, +} NvmeReservationReleaseAction; + +typedef enum { + NVME_RESV_ACQUIRE_ACTION_ACQUIRE = 0x00, + NVME_RESV_ACQUIRE_ACTION_PREEMPT = 0x01, + NVME_RESV_ACQUIRE_ACTION_PREEMPT_AND_ABORT = 0x02, +} NvmeReservationAcquireAction; + +typedef enum { + NVME_RESV_WRITE_EXCLUSIVE = 0x01, + NVME_RESV_EXCLUSIVE_ACCESS = 0x02, + NVME_RESV_WRITE_EXCLUSIVE_REGS_ONLY = 0x03, + NVME_RESV_EXCLUSIVE_ACCESS_REGS_ONLY = 0x04, + NVME_RESV_WRITE_EXCLUSIVE_ALL_REGS = 0x05, + NVME_RESV_EXCLUSIVE_ACCESS_ALL_REGS = 0x06, +} NvmeResvType; + +typedef enum { + NVME_RESV_PTPL_NO_CHANGE = 0x00, + NVME_RESV_PTPL_DISABLE = 0x02, + NVME_RESV_PTPL_ENABLE = 0x03, +} NvmeResvPTPL; + +typedef enum NVMEPrCap { + /* Persist Through Power Loss */ + NVME_PR_CAP_PTPL = 1 << 0, + /* Write Exclusive reservation type */ + NVME_PR_CAP_WR_EX = 1 << 1, + /* Exclusive Access reservation type */ + NVME_PR_CAP_EX_AC = 1 << 2, + /* Write Exclusive Registrants Only reservation type */ + NVME_PR_CAP_WR_EX_RO = 1 << 3, + /* Exclusive Access Registrants Only reservation type */ + NVME_PR_CAP_EX_AC_RO = 1 << 4, + /* Write Exclusive All Registrants reservation type */ + NVME_PR_CAP_WR_EX_AR = 1 << 5, + /* Exclusive Access All Registrants reservation type */ + NVME_PR_CAP_EX_AC_AR = 1 << 6, + + NVME_PR_CAP_ALL = (NVME_PR_CAP_PTPL | + NVME_PR_CAP_WR_EX | + NVME_PR_CAP_EX_AC | + NVME_PR_CAP_WR_EX_RO | + NVME_PR_CAP_EX_AC_RO | + NVME_PR_CAP_WR_EX_AR | + NVME_PR_CAP_EX_AC_AR), +} NvmePrCap; + typedef struct QEMU_PACKED NvmeDeleteQ { uint8_t opcode; uint8_t flags;