[PULL,00/28] target-arm queue

The following changes since commit 35152940b78e478b97051a799cb6275ced03192e: Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging (2024-10-14 17:05:25 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20241015 for you to fetch changes up to 9bb9833fd2ef30c5c7306c6f2a15dcc313305ccc: hw/arm/xilinx_zynq: Add various missing unimplemented devices (2024-10-15 11:29:47 +0100) ---------------------------------------------------------------- target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add RCC device to stm32f405 SoC * arm/gicv3: add missing casts * hw/misc: Create STM32L4x5 SYSCFG clock * hw/arm: Add SPI to Allwinner A10 * hw/intc/omap_intc: Remove now-unnecessary abstract base class * hw/char/pl011: Use correct masks for IBRD and FBRD * docs/devel: Convert txt files to rST * Remove MAX111X, MAX7310, DSCM-1XXXX, pcmcia devices (used only by now-removed omap/pxa2xx boards) * vl.c: Remove pxa2xx-specific -portrait and -rotate options * dma: Fix function names in documentation * hw/arm/xilinx_zynq: Add various missing unimplemented devices ---------------------------------------------------------------- Akihiko Odaki (1): dma: Fix function names in documentation Alexandra Diupina (3): hw/intc/arm_gicv3: Add cast to match the documentation hw/intc/arm_gicv3: Add cast to match the documentation hw/intc/arm_gicv3_cpuif: Add cast to match the documentation Chao Liu (1): hw/arm/xilinx_zynq: Add various missing unimplemented devices Inès Varhol (3): hw/misc: Create STM32L4x5 SYSCFG clock hw/clock: Expose 'qtest-clock-period' QOM property for QTests tests/qtest: Check STM32L4x5 clock connections Peter Maydell (15): hw/intc/omap_intc: Remove now-unnecessary abstract base class hw/char/pl011: Use correct masks for IBRD and FBRD docs/devel/blkdebug: Convert to rST format docs/devel/blkverify: Convert to rST format docs/devel/lockcnt: Convert to rST format docs/devel/multiple-iothreads: Convert to rST format docs/devel/rcu: Convert to rST format include: Move QemuLockCnt APIs to their own header docs/devel/lockcnt: Include kernel-doc API documentation hw/adc: Remove MAX111X device hw/gpio: Remove MAX7310 device hw/ide: Remove DSCM-1XXXX microdrive device model hw: Remove PCMCIA subsystem hw/block: Remove ecc vl.c: Remove pxa2xx-specific -portrait and -rotate options Philippe Mathieu-Daudé (1): hw/arm/omap1: Remove unused omap_uwire_attach() method Román Cárdenas Rodríguez (2): hw/misc/stm32_rcc: Implement RCC device for STM32F4 SoCs hw/arm/stm32f405: Add RCC device to stm32f405 SoC Strahinja Jankovic (2): hw/ssi: Allwinner A10 SPI emulation hw/arm: Add SPI to Allwinner A10 MAINTAINERS | 10 +- docs/about/removed-features.rst | 23 + docs/devel/blkdebug.txt | 162 ------ docs/devel/clocks.rst | 6 + docs/devel/index-api.rst | 1 + docs/devel/index-internals.rst | 2 + docs/devel/{lockcnt.txt => lockcnt.rst} | 89 +-- docs/devel/multiple-iothreads.rst | 139 +++++ docs/devel/multiple-iothreads.txt | 130 ----- docs/devel/{rcu.txt => rcu.rst} | 172 +++--- docs/devel/testing/blkdebug.rst | 177 ++++++ .../devel/{blkverify.txt => testing/blkverify.rst} | 30 +- docs/devel/testing/index.rst | 2 + docs/system/arm/cubieboard.rst | 1 + docs/system/arm/stm32.rst | 3 +- include/block/aio.h | 1 + include/hw/adc/max111x.h | 56 -- include/hw/arm/allwinner-a10.h | 2 + include/hw/arm/omap.h | 10 +- include/hw/arm/stm32f405_soc.h | 2 + include/hw/block/flash.h | 11 - include/hw/core/cpu.h | 1 + include/hw/misc/stm32_rcc.h | 91 +++ include/hw/misc/stm32l4x5_syscfg.h | 1 + include/hw/pcmcia.h | 66 --- include/hw/ssi/allwinner-a10-spi.h | 57 ++ include/qemu/lockcnt.h | 130 +++++ include/qemu/thread.h | 111 ---- include/sysemu/dma.h | 11 +- include/sysemu/sysemu.h | 1 - tests/qtest/stm32l4x5.h | 42 ++ accel/accel-blocker.c | 1 + hw/adc/max111x.c | 236 -------- hw/arm/allwinner-a10.c | 8 + hw/arm/omap1.c | 29 +- hw/arm/stm32f405_soc.c | 12 +- hw/arm/stm32l4x5_soc.c | 2 + hw/arm/xilinx_zynq.c | 70 +++ hw/block/ecc.c | 91 --- hw/char/pl011.c | 4 +- hw/core/clock.c | 16 + hw/core/cpu-common.c | 1 + hw/gpio/max7310.c | 217 ------- hw/ide/microdrive.c | 644 --------------------- hw/intc/arm_gicv3_cpuif.c | 6 +- hw/intc/omap_intc.c | 13 +- hw/misc/stm32_rcc.c | 162 ++++++ hw/misc/stm32l4x5_syscfg.c | 19 +- hw/pcmcia/pcmcia.c | 24 - hw/ssi/allwinner-a10-spi.c | 561 ++++++++++++++++++ system/globals.c | 1 - system/vl.c | 11 - tests/qtest/stm32l4x5_gpio-test.c | 23 + tests/qtest/stm32l4x5_syscfg-test.c | 20 +- tests/qtest/stm32l4x5_usart-test.c | 26 + ui/input.c | 36 -- util/aio-posix.c | 1 + util/aio-win32.c | 1 + util/async.c | 1 + util/fdmon-epoll.c | 1 + util/lockcnt.c | 1 + hw/Kconfig | 1 - hw/adc/Kconfig | 3 - hw/adc/meson.build | 1 - hw/arm/Kconfig | 3 +- hw/block/Kconfig | 3 - hw/block/meson.build | 1 - hw/gpio/Kconfig | 4 - hw/gpio/meson.build | 1 - hw/ide/Kconfig | 6 - hw/ide/meson.build | 1 - hw/meson.build | 1 - hw/misc/Kconfig | 4 +- hw/misc/meson.build | 1 + hw/misc/trace-events | 6 + hw/pcmcia/Kconfig | 2 - hw/pcmcia/meson.build | 1 - hw/ssi/Kconfig | 4 + hw/ssi/meson.build | 1 + hw/ssi/trace-events | 10 + qemu-options.hx | 16 - 81 files changed, 1800 insertions(+), 2048 deletions(-) delete mode 100644 docs/devel/blkdebug.txt rename docs/devel/{lockcnt.txt => lockcnt.rst} (75%) create mode 100644 docs/devel/multiple-iothreads.rst delete mode 100644 docs/devel/multiple-iothreads.txt rename docs/devel/{rcu.txt => rcu.rst} (73%) create mode 100644 docs/devel/testing/blkdebug.rst rename docs/devel/{blkverify.txt => testing/blkverify.rst} (77%) delete mode 100644 include/hw/adc/max111x.h create mode 100644 include/hw/misc/stm32_rcc.h delete mode 100644 include/hw/pcmcia.h create mode 100644 include/hw/ssi/allwinner-a10-spi.h create mode 100644 include/qemu/lockcnt.h create mode 100644 tests/qtest/stm32l4x5.h delete mode 100644 hw/adc/max111x.c delete mode 100644 hw/block/ecc.c delete mode 100644 hw/gpio/max7310.c delete mode 100644 hw/ide/microdrive.c create mode 100644 hw/misc/stm32_rcc.c delete mode 100644 hw/pcmcia/pcmcia.c create mode 100644 hw/ssi/allwinner-a10-spi.c delete mode 100644 hw/pcmcia/Kconfig delete mode 100644 hw/pcmcia/meson.build

Message ID	20241015103808.133024-1-peter.maydell@linaro.org (mailing list archive)
State	New
Headers	show Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 00/28] target-arm queue Date: Tue, 15 Oct 2024 11:37:40 +0100 Message-Id: <20241015103808.133024-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org

[PULL,00/28] target-arm queue

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