Message ID | 20241025101959.601048-14-eric.auger@redhat.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | kvm/arm: Introduce a customizable aarch64 KVM host model | expand |
On Fri, Oct 25, 2024 at 12:17:32PM +0200, Eric Auger wrote: > The known ID regs are described in a new initialization function > dubbed initialize_cpu_sysreg_properties(). That code will be > automatically generated from linux arch/arm64/tools/sysreg. For the > time being let's just describe a single id reg, CTR_EL0. In this > description we only care about non RES/RAZ fields, ie. named fields. > > The registers are populated in a 3x8x8 array and their fields are > added in a sorted list. > > Signed-off-by: Eric Auger <eric.auger@redhat.com> > --- > target/arm/cpu-custom.h | 58 ++++++++++++++++++++++++++++++ > target/arm/cpu-sysreg-properties.c | 41 +++++++++++++++++++++ > target/arm/cpu64.c | 2 ++ > target/arm/meson.build | 1 + > 4 files changed, 102 insertions(+) > create mode 100644 target/arm/cpu-custom.h > create mode 100644 target/arm/cpu-sysreg-properties.c > > diff --git a/target/arm/cpu-custom.h b/target/arm/cpu-custom.h > new file mode 100644 > index 0000000000..1952095bf7 > --- /dev/null > +++ b/target/arm/cpu-custom.h > @@ -0,0 +1,58 @@ > +#ifndef ARM_CPU_CUSTOM_H > +#define ARM_CPU_CUSTOM_H License header her. > diff --git a/target/arm/cpu-sysreg-properties.c b/target/arm/cpu-sysreg-properties.c > new file mode 100644 > index 0000000000..753e7c9127 > --- /dev/null > +++ b/target/arm/cpu-sysreg-properties.c > @@ -0,0 +1,41 @@ > +/* > + * QEMU ARM CPU SYSREG PROPERTIES > + * to be generated from linux sysreg > + * > + * Copyright (c) 2024, Inc. 2024 ^^^^ missing company name :-) > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version 2 > + * of the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, see > + * <http://www.gnu.org/licenses/gpl-2.0.html> > + */ > + > +#include "cpu-custom.h" > + > +ARM64SysReg arm64_id_regs[NR_ID_REGS]; > + > +void initialize_cpu_sysreg_properties(void) > +{ > + memset(arm64_id_regs, 0, sizeof(ARM64SysReg) * NR_ID_REGS); ^^^ just sizeof(arm64_id_regs) > + /* CTR_EL0 */ > + ARM64SysReg *CTR_EL0 = arm64_sysreg_get(3, 3, 0, 0, 1); > + CTR_EL0->name = "CTR_EL0"; > + arm64_sysreg_add_field(CTR_EL0, "TMinline", 32, 37); > + arm64_sysreg_add_field(CTR_EL0, "DIC", 29, 29); > + arm64_sysreg_add_field(CTR_EL0, "IDC", 28, 28); > + arm64_sysreg_add_field(CTR_EL0, "CWG", 24, 27); > + arm64_sysreg_add_field(CTR_EL0, "ERG", 20, 23); > + arm64_sysreg_add_field(CTR_EL0, "DMinLine", 16, 19); > + arm64_sysreg_add_field(CTR_EL0, "L1Ip", 14, 15); > + arm64_sysreg_add_field(CTR_EL0, "IminLine", 0, 3); > +} > + With regards, Daniel
diff --git a/target/arm/cpu-custom.h b/target/arm/cpu-custom.h new file mode 100644 index 0000000000..1952095bf7 --- /dev/null +++ b/target/arm/cpu-custom.h @@ -0,0 +1,58 @@ +#ifndef ARM_CPU_CUSTOM_H +#define ARM_CPU_CUSTOM_H + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "cpu.h" +#include "cpu-sysregs.h" + +typedef struct ARM64SysRegField { + const char *name; /* name of the field, for instance CTR_EL0_IDC */ + int index; + int lower; + int upper; +} ARM64SysRegField; + +typedef struct ARM64SysReg { + const char *name; /* name of the sysreg, for instance CTR_EL0 */ + ARMSysReg *sysreg; + int index; + GList *fields; /* list of named fields, excluding RES* */ +} ARM64SysReg; + +void initialize_cpu_sysreg_properties(void); + +/* + * List of exposed ID regs (automatically populated from linux + * arch/arm64/tools/sysreg) + */ +extern ARM64SysReg arm64_id_regs[NR_ID_REGS]; + +/* Allocate a new field and insert it at the head of the @reg list */ +static inline GList *arm64_sysreg_add_field(ARM64SysReg *reg, const char *name, + uint8_t min, uint8_t max) { + + ARM64SysRegField *field = g_new0(ARM64SysRegField, 1); + + field->name = name; + field->lower = min; + field->upper = max; + field->index = reg->index; + + reg->fields = g_list_append(reg->fields, field); + return reg->fields; +} + +static inline ARM64SysReg * +arm64_sysreg_get(int op0, int op1, int crn, int crm, int op2) +{ + uint64_t index = ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2); + ARM64SysReg *reg = &arm64_id_regs[index]; + + reg->index = index; + reg->sysreg = g_new(ARMSysReg, 1); + *reg->sysreg = sys_reg(op0, op1, crn, crm, op2); + return reg; +} + +#endif diff --git a/target/arm/cpu-sysreg-properties.c b/target/arm/cpu-sysreg-properties.c new file mode 100644 index 0000000000..753e7c9127 --- /dev/null +++ b/target/arm/cpu-sysreg-properties.c @@ -0,0 +1,41 @@ +/* + * QEMU ARM CPU SYSREG PROPERTIES + * to be generated from linux sysreg + * + * Copyright (c) 2024, Inc. 2024 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * <http://www.gnu.org/licenses/gpl-2.0.html> + */ + +#include "cpu-custom.h" + +ARM64SysReg arm64_id_regs[NR_ID_REGS]; + +void initialize_cpu_sysreg_properties(void) +{ + memset(arm64_id_regs, 0, sizeof(ARM64SysReg) * NR_ID_REGS); + /* CTR_EL0 */ + ARM64SysReg *CTR_EL0 = arm64_sysreg_get(3, 3, 0, 0, 1); + CTR_EL0->name = "CTR_EL0"; + arm64_sysreg_add_field(CTR_EL0, "TMinline", 32, 37); + arm64_sysreg_add_field(CTR_EL0, "DIC", 29, 29); + arm64_sysreg_add_field(CTR_EL0, "IDC", 28, 28); + arm64_sysreg_add_field(CTR_EL0, "CWG", 24, 27); + arm64_sysreg_add_field(CTR_EL0, "ERG", 20, 23); + arm64_sysreg_add_field(CTR_EL0, "DMinLine", 16, 19); + arm64_sysreg_add_field(CTR_EL0, "L1Ip", 14, 15); + arm64_sysreg_add_field(CTR_EL0, "IminLine", 0, 3); +} + diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 57e73fdd38..9f20886668 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -34,6 +34,7 @@ #include "internals.h" #include "cpu-features.h" #include "cpregs.h" +#include "cpu-custom.h" void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { @@ -844,6 +845,7 @@ static void aarch64_cpu_register_types(void) { size_t i; + initialize_cpu_sysreg_properties(); type_register_static(&aarch64_cpu_type_info); for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) { diff --git a/target/arm/meson.build b/target/arm/meson.build index 2e10464dbb..9c7a04ee1b 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -14,6 +14,7 @@ arm_ss.add(when: 'CONFIG_HVF', if_true: files('hyp_gdbstub.c')) arm_ss.add(when: 'TARGET_AARCH64', if_true: files( 'cpu64.c', 'gdbstub64.c', + 'cpu-sysreg-properties.c', )) arm_system_ss = ss.source_set()
The known ID regs are described in a new initialization function dubbed initialize_cpu_sysreg_properties(). That code will be automatically generated from linux arch/arm64/tools/sysreg. For the time being let's just describe a single id reg, CTR_EL0. In this description we only care about non RES/RAZ fields, ie. named fields. The registers are populated in a 3x8x8 array and their fields are added in a sorted list. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- target/arm/cpu-custom.h | 58 ++++++++++++++++++++++++++++++ target/arm/cpu-sysreg-properties.c | 41 +++++++++++++++++++++ target/arm/cpu64.c | 2 ++ target/arm/meson.build | 1 + 4 files changed, 102 insertions(+) create mode 100644 target/arm/cpu-custom.h create mode 100644 target/arm/cpu-sysreg-properties.c