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[82.218.84.190]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cee6a9a41bsm1467773a12.14.2024.11.05.08.00.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 08:00:57 -0800 (PST) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, pbonzini@redhat.com, Phil Dennis-Jordan Subject: [PATCH 5/5] i386/hvf: Removes duplicate/shadowed variables in hvf_vcpu_exec Date: Tue, 5 Nov 2024 16:58:00 +0100 Message-Id: <20241105155800.5461-6-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20241105155800.5461-1-phil@philjordan.eu> References: <20241105155800.5461-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::52b; envelope-from=phil@philjordan.eu; helo=mail-ed1-x52b.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Pointers to the x86 CPU state already exist at the function scope, no need to re-obtain them in individual exit reason cases. Signed-off-by: Phil Dennis-Jordan --- target/i386/hvf/hvf.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 8527bce6eef..c5d025d5576 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -586,8 +586,6 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case EXIT_REASON_XSETBV: { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUX86State *env = &x86_cpu->env; uint32_t eax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); uint32_t ecx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); uint32_t edx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); @@ -644,7 +642,6 @@ int hvf_vcpu_exec(CPUState *cpu) break; } case 8: { - X86CPU *x86_cpu = X86_CPU(cpu); if (exit_qual & 0x10) { RRX(env, reg) = cpu_get_apic_tpr(x86_cpu->apic_state); } else {