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[124.171.217.17]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7f41f48d32bsm3110444a12.17.2024.11.08.07.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 07:42:57 -0800 (PST) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , "Michael S. Tsirkin" , Marcel Apfelbaum , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , Gerd Hoffmann Subject: [RFC PATCH 5/5] hw/usb: Support XHCI TR NOOP commands Date: Sat, 9 Nov 2024 01:42:28 +1000 Message-ID: <20241108154229.263097-6-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241108154229.263097-1-npiggin@gmail.com> References: <20241108154229.263097-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=npiggin@gmail.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement TR NOOP commands by setting up then immediately completing the packet. Add a TR NOOP test to the xhci qtest. The IBM AIX XHCI driver uses NOOP commands to check driver and hardware health. Signed-off-by: Nicholas Piggin --- hw/usb/hcd-xhci.c | 28 ++++++++++++++++++++++++++- tests/qtest/usb-hcd-xhci-test.c | 34 +++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index d85adaca0d..9e223acd83 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -1832,6 +1832,20 @@ static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext return xhci_submit(xhci, xfer, epctx); } +static int xhci_noop_transfer(XHCIState *xhci, XHCITransfer *xfer) +{ + /* + * TR NOOP conceptually probably better not call into USB subsystem + * (usb_packet_setup() via xhci_setup_packet()). In practice it + * works and avoids code duplication. + */ + if (xhci_setup_packet(xfer) < 0) { + return -1; + } + xhci_try_complete_packet(xfer); + return 0; +} + static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid, unsigned int streamid) { @@ -1954,6 +1968,8 @@ static void xhci_kick_epctx(XHCIEPContext *epctx, unsigned int streamid) epctx->kick_active++; while (1) { + bool noop = false; + length = xhci_ring_chain_length(xhci, ring); if (length <= 0) { if (epctx->type == ET_ISO_OUT || epctx->type == ET_ISO_IN) { @@ -1982,10 +1998,20 @@ static void xhci_kick_epctx(XHCIEPContext *epctx, unsigned int streamid) epctx->kick_active--; return; } + if (type == TR_NOOP) { + noop = true; + } } xfer->streamid = streamid; - if (epctx->epid == 1) { + if (noop) { + if (length != 1) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: NOOP TR TRB within TRB chain!\n", __func__); + /* Undefined behavior, we no-op the entire chain */ + } + xhci_noop_transfer(xhci, xfer); + } else if (epctx->epid == 1) { xhci_fire_ctl_transfer(xhci, xfer); } else { xhci_fire_transfer(xhci, xfer, epctx); diff --git a/tests/qtest/usb-hcd-xhci-test.c b/tests/qtest/usb-hcd-xhci-test.c index d66e76f070..8a36f42522 100644 --- a/tests/qtest/usb-hcd-xhci-test.c +++ b/tests/qtest/usb-hcd-xhci-test.c @@ -357,6 +357,30 @@ static void submit_cr_trb(XHCIQState *s, XHCITRB *trb) xhci_db_writel(s, 0, 0); /* doorbell 0 */ } +static void submit_tr_trb(XHCIQState *s, int slot, XHCITRB *trb) +{ + XHCITRB t; + uint64_t tr_addr = s->slots[slot].transfer_ring + s->slots[slot].tr_trb_idx * sizeof(*trb); + + trb->control |= s->slots[slot].tr_trb_c; /* C */ + + t.parameter = cpu_to_le64(trb->parameter); + t.status = cpu_to_le32(trb->status); + t.control = cpu_to_le32(trb->control); + + qtest_memwrite(s->parent->qts, tr_addr, &t, sizeof(t)); + s->slots[slot].tr_trb_idx++; + /* Last entry contains the link, so wrap back */ + if (s->slots[slot].tr_trb_idx == s->slots[slot].tr_trb_entries - 1) { + set_link_trb(s, s->slots[slot].transfer_ring, + s->slots[slot].tr_trb_c, + s->slots[slot].tr_trb_entries); + s->slots[slot].tr_trb_idx = 0; + s->slots[slot].tr_trb_c ^= 1; + } + xhci_db_writel(s, slot, 1); /* doorbell slot, EP0 target */ +} + static void pci_xhci_stress_rings(void) { XHCIQState *s; @@ -509,6 +533,16 @@ static void pci_xhci_stress_rings(void) /* XXX: Check EP state is running? */ + /* Wrap the transfer ring a few times */ + for (i = 0; i < 100; i++) { + /* Issue a transfer ring slot 0 noop */ + memset(&trb, 0, sizeof(trb)); + trb.control |= TR_NOOP << TRB_TYPE_SHIFT; + trb.control |= TRB_TR_IOC; + submit_tr_trb(s, slotid, &trb); + wait_event_trb(s, &trb); + } + /* Shut it down */ qpci_msix_disable(s->dev);