| Message ID | 20241112172022.88348-5-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Convert nanoMIPS LSA opcode to decodetree | expand |
On 11/12/24 09:20, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/mips/tcg/msa.decode | 3 ++- > target/mips/tcg/rel6.decode | 4 +++- > target/mips/tcg/msa_translate.c | 4 ++-- > target/mips/tcg/rel6_translate.c | 9 +++++++-- > 4 files changed, 14 insertions(+), 6 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~ > > diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode > index 4410e2a02e..798e8c401a 100644 > --- a/target/mips/tcg/msa.decode > +++ b/target/mips/tcg/msa.decode > @@ -21,6 +21,7 @@ > &msa_elm_df df wd ws n > &msa_elm wd ws > > +%lsa_sa 6:2 !function=plus_1 > %elm_df 16:6 !function=elm_df > %elm_n 16:6 !function=elm_n > %bit_df 16:7 !function=bit_df > @@ -29,7 +30,7 @@ > %3r_df_h 21:1 !function=plus_1 > %3r_df_w 21:1 !function=plus_2 > > -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r > +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa > @ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i > @bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3 > @bz ...... ... df:2 wt:5 sa:s16 &msa_bz > diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode > index d6989cf56e..a9031171b5 100644 > --- a/target/mips/tcg/rel6.decode > +++ b/target/mips/tcg/rel6.decode > @@ -16,7 +16,9 @@ > > &r rs rt rd sa > > -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r > +%lsa_sa 6:2 !function=plus_1 > + > +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa > > LSA 000000 ..... ..... ..... 000 .. 000101 @lsa > DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa > diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c > index 82b149922f..75cf80a20e 100644 > --- a/target/mips/tcg/msa_translate.c > +++ b/target/mips/tcg/msa_translate.c > @@ -780,7 +780,7 @@ TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st); > > static bool trans_LSA(DisasContext *ctx, arg_r *a) > { > - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); > + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); > } > > static bool trans_DLSA(DisasContext *ctx, arg_r *a) > @@ -788,5 +788,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) > if (TARGET_LONG_BITS != 64) { > return false; > } > - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); > + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); > } > diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c > index 363bc86491..2522ecae2b 100644 > --- a/target/mips/tcg/rel6_translate.c > +++ b/target/mips/tcg/rel6_translate.c > @@ -11,6 +11,11 @@ > #include "qemu/osdep.h" > #include "translate.h" > > +static inline int plus_1(DisasContext *ctx, int x) > +{ > + return x + 1; > +} > + > /* Include the auto-generated decoders. */ > #include "decode-rel6.c.inc" > > @@ -23,7 +28,7 @@ bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a) > > static bool trans_LSA(DisasContext *ctx, arg_r *a) > { > - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); > + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); > } > > static bool trans_DLSA(DisasContext *ctx, arg_r *a) > @@ -31,5 +36,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) > if (TARGET_LONG_BITS != 64) { > return false; > } > - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); > + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); > }
diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode index 4410e2a02e..798e8c401a 100644 --- a/target/mips/tcg/msa.decode +++ b/target/mips/tcg/msa.decode @@ -21,6 +21,7 @@ &msa_elm_df df wd ws n &msa_elm wd ws +%lsa_sa 6:2 !function=plus_1 %elm_df 16:6 !function=elm_df %elm_n 16:6 !function=elm_n %bit_df 16:7 !function=bit_df @@ -29,7 +30,7 @@ %3r_df_h 21:1 !function=plus_1 %3r_df_w 21:1 !function=plus_2 -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa @ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i @bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3 @bz ...... ... df:2 wt:5 sa:s16 &msa_bz diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode index d6989cf56e..a9031171b5 100644 --- a/target/mips/tcg/rel6.decode +++ b/target/mips/tcg/rel6.decode @@ -16,7 +16,9 @@ &r rs rt rd sa -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r +%lsa_sa 6:2 !function=plus_1 + +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa LSA 000000 ..... ..... ..... 000 .. 000101 @lsa DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 82b149922f..75cf80a20e 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -780,7 +780,7 @@ TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st); static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -788,5 +788,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); } diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c index 363bc86491..2522ecae2b 100644 --- a/target/mips/tcg/rel6_translate.c +++ b/target/mips/tcg/rel6_translate.c @@ -11,6 +11,11 @@ #include "qemu/osdep.h" #include "translate.h" +static inline int plus_1(DisasContext *ctx, int x) +{ + return x + 1; +} + /* Include the auto-generated decoders. */ #include "decode-rel6.c.inc" @@ -23,7 +28,7 @@ bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a) static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -31,5 +36,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); }
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/mips/tcg/msa.decode | 3 ++- target/mips/tcg/rel6.decode | 4 +++- target/mips/tcg/msa_translate.c | 4 ++-- target/mips/tcg/rel6_translate.c | 9 +++++++-- 4 files changed, 14 insertions(+), 6 deletions(-)