| Message ID | 20241114011310.3615-21-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | exec: Build up 'cputlb.h' and 'ram_addr.h' headers | expand |
On 11/13/24 17:13, Philippe Mathieu-Daudé wrote: > Move CPU TLB related methods to "exec/cputlb.h". > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > include/exec/cpu_ldst.h | 25 ------------------------- > include/exec/cputlb.h | 26 ++++++++++++++++++++++++++ > target/arm/tcg/helper-a64.c | 1 + > target/ppc/mem_helper.c | 1 + > 4 files changed, 28 insertions(+), 25 deletions(-) > > diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h > index 769e9fc440..eec47ca05e 100644 > --- a/include/exec/cpu_ldst.h > +++ b/include/exec/cpu_ldst.h > @@ -69,7 +69,6 @@ > #include "exec/memopidx.h" > #include "exec/vaddr.h" > #include "exec/abi_ptr.h" > -#include "exec/mmu-access-type.h" > #include "qemu/int128.h" > > #if defined(CONFIG_USER_ONLY) > @@ -311,30 +310,6 @@ uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); > uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); > uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); > > -/** > - * tlb_vaddr_to_host: > - * @env: CPUArchState > - * @addr: guest virtual address to look up > - * @access_type: 0 for read, 1 for write, 2 for execute > - * @mmu_idx: MMU index to use for lookup > - * > - * Look up the specified guest virtual index in the TCG softmmu TLB. > - * If we can translate a host virtual address suitable for direct RAM > - * access, without causing a guest exception, then return it. > - * Otherwise (TLB entry is for an I/O access, guest software > - * TLB fill required, etc) return NULL. > - */ > -#ifdef CONFIG_USER_ONLY > -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, > - MMUAccessType access_type, int mmu_idx) > -{ > - return g2h(env_cpu(env), addr); > -} > -#else > -void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, > - MMUAccessType access_type, int mmu_idx); > -#endif > - > /* > * For user-only, helpers that use guest to host address translation > * must protect the actual host memory access by recording 'retaddr' > diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h > index 07c4bc669e..4acc2c6235 100644 > --- a/include/exec/cputlb.h > +++ b/include/exec/cputlb.h > @@ -20,6 +20,7 @@ > #ifndef CPUTLB_H > #define CPUTLB_H > > +#include "exec/abi_ptr.h" > #include "exec/cpu-common.h" > #include "exec/hwaddr.h" > #include "exec/memattrs.h" > @@ -306,4 +307,29 @@ void tlb_set_page(CPUState *cpu, vaddr addr, > hwaddr paddr, int prot, > int mmu_idx, vaddr size); > > +/** > + * tlb_vaddr_to_host: > + * @env: CPUArchState > + * @addr: guest virtual address to look up > + * @access_type: 0 for read, 1 for write, 2 for execute > + * @mmu_idx: MMU index to use for lookup > + * > + * Look up the specified guest virtual index in the TCG softmmu TLB. > + * If we can translate a host virtual address suitable for direct RAM > + * access, without causing a guest exception, then return it. > + * Otherwise (TLB entry is for an I/O access, guest software > + * TLB fill required, etc) return NULL. > + */ > +#ifdef CONFIG_USER_ONLY > +#include "user/guest-host.h" > +static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, > + MMUAccessType access_type, int mmu_idx) > +{ > + return g2h(env_cpu(env), addr); > +} > +#else > +void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, > + MMUAccessType access_type, int mmu_idx); > +#endif > + > #endif > diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c > index 8f42a28d07..9cb5d8ee53 100644 > --- a/target/arm/tcg/helper-a64.c > +++ b/target/arm/tcg/helper-a64.c > @@ -30,6 +30,7 @@ > #include "qemu/crc32c.h" > #include "exec/exec-all.h" > #include "exec/cpu_ldst.h" > +#include "exec/cputlb.h" > #include "qemu/int128.h" > #include "qemu/atomic128.h" > #include "fpu/softfloat.h" > diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c > index 51b137febd..44974b25f8 100644 > --- a/target/ppc/mem_helper.c > +++ b/target/ppc/mem_helper.c > @@ -24,6 +24,7 @@ > #include "exec/helper-proto.h" > #include "helper_regs.h" > #include "exec/cpu_ldst.h" > +#include "exec/cputlb.h" > #include "internal.h" > #include "qemu/atomic128.h" > Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 769e9fc440..eec47ca05e 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -69,7 +69,6 @@ #include "exec/memopidx.h" #include "exec/vaddr.h" #include "exec/abi_ptr.h" -#include "exec/mmu-access-type.h" #include "qemu/int128.h" #if defined(CONFIG_USER_ONLY) @@ -311,30 +310,6 @@ uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -#ifdef CONFIG_USER_ONLY -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx) -{ - return g2h(env_cpu(env), addr); -} -#else -void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, - MMUAccessType access_type, int mmu_idx); -#endif - /* * For user-only, helpers that use guest to host address translation * must protect the actual host memory access by recording 'retaddr' diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 07c4bc669e..4acc2c6235 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -20,6 +20,7 @@ #ifndef CPUTLB_H #define CPUTLB_H +#include "exec/abi_ptr.h" #include "exec/cpu-common.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" @@ -306,4 +307,29 @@ void tlb_set_page(CPUState *cpu, vaddr addr, hwaddr paddr, int prot, int mmu_idx, vaddr size); +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +#ifdef CONFIG_USER_ONLY +#include "user/guest-host.h" +static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx) +{ + return g2h(env_cpu(env), addr); +} +#else +void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, + MMUAccessType access_type, int mmu_idx); +#endif + #endif diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index 8f42a28d07..9cb5d8ee53 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -30,6 +30,7 @@ #include "qemu/crc32c.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "exec/cputlb.h" #include "qemu/int128.h" #include "qemu/atomic128.h" #include "fpu/softfloat.h" diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 51b137febd..44974b25f8 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "helper_regs.h" #include "exec/cpu_ldst.h" +#include "exec/cputlb.h" #include "internal.h" #include "qemu/atomic128.h"
Move CPU TLB related methods to "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- include/exec/cpu_ldst.h | 25 ------------------------- include/exec/cputlb.h | 26 ++++++++++++++++++++++++++ target/arm/tcg/helper-a64.c | 1 + target/ppc/mem_helper.c | 1 + 4 files changed, 28 insertions(+), 25 deletions(-)