| Message ID | 20241114160131.48616-50-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | accel/tcg: Convert victim tlb to IntervalTree | expand |
On 11/14/24 08:01, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/tricore/cpu.h | 7 ++++--- > target/tricore/cpu.c | 2 +- > target/tricore/helper.c | 19 ++++++++++++------- > 3 files changed, 17 insertions(+), 11 deletions(-) > > diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h > index 220af69fc2..5f141ce8f3 100644 > --- a/target/tricore/cpu.h > +++ b/target/tricore/cpu.h > @@ -268,8 +268,9 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc, > #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU > > /* helpers.c */ > -bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > - MMUAccessType access_type, int mmu_idx, > - bool probe, uintptr_t retaddr); > +bool tricore_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, > + vaddr addr, MMUAccessType access_type, > + int mmu_idx, MemOp memop, int size, > + bool probe, uintptr_t retaddr); > > #endif /* TRICORE_CPU_H */ > diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c > index 1a26171590..29e0b5d129 100644 > --- a/target/tricore/cpu.c > +++ b/target/tricore/cpu.c > @@ -173,7 +173,7 @@ static const TCGCPUOps tricore_tcg_ops = { > .initialize = tricore_tcg_init, > .synchronize_from_tb = tricore_cpu_synchronize_from_tb, > .restore_state_to_opc = tricore_restore_state_to_opc, > - .tlb_fill = tricore_cpu_tlb_fill, > + .tlb_fill_align = tricore_cpu_tlb_fill_align, > .cpu_exec_interrupt = tricore_cpu_exec_interrupt, > .cpu_exec_halt = tricore_cpu_has_work, > }; > diff --git a/target/tricore/helper.c b/target/tricore/helper.c > index 7014255f77..8c6bf63298 100644 > --- a/target/tricore/helper.c > +++ b/target/tricore/helper.c > @@ -64,16 +64,19 @@ static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, > { > } > > -bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > - MMUAccessType rw, int mmu_idx, > - bool probe, uintptr_t retaddr) > +bool tricore_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, > + vaddr address, MMUAccessType access_type, > + int mmu_idx, MemOp memop, int size, > + bool probe, uintptr_t retaddr) > { > CPUTriCoreState *env = cpu_env(cs); > hwaddr physical; > int prot; > int ret = 0; > + int rw = access_type & 1; > + > + /* TODO: alignment faults not currently handled. */ > > - rw &= 1; > ret = get_physical_address(env, &physical, &prot, > address, rw, mmu_idx); > > @@ -82,9 +85,11 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > __func__, address, ret, physical, prot); > > if (ret == TLBRET_MATCH) { > - tlb_set_page(cs, address & TARGET_PAGE_MASK, > - physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, > - mmu_idx, TARGET_PAGE_SIZE); > + memset(out, 0, sizeof(*out)); > + out->phys_addr = physical; > + out->prot = prot | PAGE_EXEC; > + out->lg_page_size = TARGET_PAGE_BITS; > + out->attrs = MEMTXATTRS_UNSPECIFIED; > return true; > } else { > assert(ret < 0); Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 220af69fc2..5f141ce8f3 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -268,8 +268,9 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc, #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU /* helpers.c */ -bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); +bool tricore_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, + vaddr addr, MMUAccessType access_type, + int mmu_idx, MemOp memop, int size, + bool probe, uintptr_t retaddr); #endif /* TRICORE_CPU_H */ diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 1a26171590..29e0b5d129 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -173,7 +173,7 @@ static const TCGCPUOps tricore_tcg_ops = { .initialize = tricore_tcg_init, .synchronize_from_tb = tricore_cpu_synchronize_from_tb, .restore_state_to_opc = tricore_restore_state_to_opc, - .tlb_fill = tricore_cpu_tlb_fill, + .tlb_fill_align = tricore_cpu_tlb_fill_align, .cpu_exec_interrupt = tricore_cpu_exec_interrupt, .cpu_exec_halt = tricore_cpu_has_work, }; diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 7014255f77..8c6bf63298 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -64,16 +64,19 @@ static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, { } -bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType rw, int mmu_idx, - bool probe, uintptr_t retaddr) +bool tricore_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, + vaddr address, MMUAccessType access_type, + int mmu_idx, MemOp memop, int size, + bool probe, uintptr_t retaddr) { CPUTriCoreState *env = cpu_env(cs); hwaddr physical; int prot; int ret = 0; + int rw = access_type & 1; + + /* TODO: alignment faults not currently handled. */ - rw &= 1; ret = get_physical_address(env, &physical, &prot, address, rw, mmu_idx); @@ -82,9 +85,11 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) { - tlb_set_page(cs, address & TARGET_PAGE_MASK, - physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, - mmu_idx, TARGET_PAGE_SIZE); + memset(out, 0, sizeof(*out)); + out->phys_addr = physical; + out->prot = prot | PAGE_EXEC; + out->lg_page_size = TARGET_PAGE_BITS; + out->attrs = MEMTXATTRS_UNSPECIFIED; return true; } else { assert(ret < 0);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/tricore/cpu.h | 7 ++++--- target/tricore/cpu.c | 2 +- target/tricore/helper.c | 19 ++++++++++++------- 3 files changed, 17 insertions(+), 11 deletions(-)