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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 11/13] hw/arm/virt: Create GPEX host bridge without refuse-bar-at-addr-0 Date: Tue, 26 Nov 2024 12:22:10 +0100 Message-ID: <20241126112212.64524-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ARM virt and sbsa-ref machines set MachineClass::pci_allow_0_address (see commit 74de8c3568 "hw/arm/virt: Allow zero address for PCI IO space"), directly create the GPEX host bridge using the default 'false' value of the "refuse-bar-at-addr-0" property. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/sbsa-ref.c | 3 --- hw/arm/virt.c | 3 --- 2 files changed, 6 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index f6cf43cf0c9..c232b933c07 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -647,8 +647,6 @@ static void create_pcie(SBSAMachineState *sms) int i; dev = qdev_new(TYPE_GPEX_HOST); - object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", - true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map ECAM space */ @@ -898,7 +896,6 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2"); mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = 512; - mc->pci_allow_0_address = true; mc->minimum_page_bits = 12; mc->block_default_type = IF_IDE; mc->no_cdrom = 1; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 06affc3638b..f9ec3c22409 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1510,8 +1510,6 @@ static void create_pcie(VirtMachineState *vms) MachineClass *mc = MACHINE_GET_CLASS(ms); dev = qdev_new(TYPE_GPEX_HOST); - object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0", - true, &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); @@ -3126,7 +3124,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #endif mc->block_default_type = IF_VIRTIO; mc->no_cdrom = 1; - mc->pci_allow_0_address = true; /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ mc->minimum_page_bits = 12; mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;