@@ -1,6 +1,7 @@
# Octeon Architecture Module instruction set
#
# Copyright (C) 2022 Pavel Dovgalyuk
+# Copyright (C) 2024 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
@@ -39,3 +40,10 @@ CINS 011100 ..... ..... ..... ..... 11001 . @bitfield
POP 011100 rs:5 00000 rd:5 00000 10110 dw:1
SEQNE 011100 rs:5 rt:5 rd:5 00000 10101 ne:1
SEQNEI 011100 rs:5 rt:5 imm:s10 10111 ne:1
+
+&lx base index rd
+@lx ...... base:5 index:5 rd:5 ...... ..... &lx
+LWX 011111 ..... ..... ..... 00000 001010 @lx
+LHX 011111 ..... ..... ..... 00100 001010 @lx
+LBUX 011111 ..... ..... ..... 00110 001010 @lx
+LDX 011111 ..... ..... ..... 01000 001010 @lx
@@ -174,3 +174,15 @@ static bool trans_SEQNEI(DisasContext *ctx, arg_SEQNEI *a)
}
return true;
}
+
+static bool trans_lx(DisasContext *ctx, arg_lx *a, MemOp mop)
+{
+ gen_lx(ctx, a->rd, a->base, a->index, mop);
+
+ return true;
+}
+
+TRANS(LBUX, trans_lx, MO_UB);
+TRANS(LHX, trans_lx, MO_SW);
+TRANS(LWX, trans_lx, MO_SL);
+TRANS(LDX, trans_lx, MO_UQ);
@@ -13583,9 +13583,7 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
}
break;
case OPC_LX_DSP:
- if (!(ctx->insn_flags & INSN_OCTEON)) {
- check_dsp(ctx);
- }
+ check_dsp(ctx);
op2 = MASK_LX(ctx->opcode);
switch (op2) {
#if defined(TARGET_MIPS64)