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Fri, 29 Nov 2024 07:43:51 +0000 From: CLEMENT MATHIEU--DRIF To: "qemu-devel@nongnu.org" CC: "jasowang@redhat.com" , "zhenzhong.duan@intel.com" , "kevin.tian@intel.com" , "yi.l.liu@intel.com" , "joao.m.martins@oracle.com" , "peterx@redhat.com" , "mst@redhat.com" , "tjeznach@rivosinc.com" , "minwoo.im@samsung.com" , CLEMENT MATHIEU--DRIF Subject: [PATCH v1 04/19] intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry Thread-Topic: [PATCH v1 04/19] intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry Thread-Index: AQHbQjJvXDmiXC52f0OTAvckNfcVmQ== Date: Fri, 29 Nov 2024 07:43:51 +0000 Message-ID: <20241129074332.87535-5-clement.mathieu--drif@eviden.com> References: <20241129074332.87535-1-clement.mathieu--drif@eviden.com> In-Reply-To: <20241129074332.87535-1-clement.mathieu--drif@eviden.com> Accept-Language: en-GB, fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=eviden.com; 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envelope-from=clement.mathieu--drif@eviden.com; helo=smarthost4.eviden.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Clément Mathieu--Drif PASID value must be used by devices as a key (or part of a key) when populating their ATC with the IOTLB entries returned by the IOMMU. Signed-off-by: Clément Mathieu--Drif --- hw/i386/intel_iommu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index aad132e367..a92ef9fe74 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2119,6 +2119,9 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, vtd_iommu_lock(s); + /* fill the pasid before getting rid2pasid */ + entry->pasid = pasid; + cc_entry = &vtd_as->context_cache_entry; /* Try to fetch pte from IOTLB, we don't need RID2PASID logic */ @@ -2260,6 +2263,7 @@ out: entry->translated_addr = vtd_get_pte_addr(pte, s->aw_bits) & page_mask; entry->addr_mask = ~page_mask; entry->perm = access_flags; + /* pasid already set */ return true; error: @@ -2268,6 +2272,7 @@ error: entry->translated_addr = 0; entry->addr_mask = 0; entry->perm = IOMMU_NONE; + entry->pasid = PCI_NO_PASID; return false; } @@ -2511,6 +2516,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s, .translated_addr = 0, .addr_mask = size - 1, .perm = IOMMU_NONE, + .pasid = pasid, }, }; memory_region_notify_iommu(&vtd_as->iommu, 0, event); @@ -3098,6 +3104,7 @@ static void do_invalidate_device_tlb(VTDAddressSpace *vtd_dev_as, event.entry.iova = addr; event.entry.perm = IOMMU_NONE; event.entry.translated_addr = 0; + event.entry.pasid = vtd_dev_as->pasid; memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event); } @@ -3680,6 +3687,7 @@ static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr, IOMMUTLBEntry iotlb = { /* We'll fill in the rest later. */ .target_as = &address_space_memory, + .pasid = vtd_as->pasid, }; bool success; @@ -3692,6 +3700,7 @@ static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr, iotlb.translated_addr = addr & VTD_PAGE_MASK_4K; iotlb.addr_mask = ~VTD_PAGE_MASK_4K; iotlb.perm = IOMMU_RW; + iotlb.pasid = PCI_NO_PASID; success = true; }