@@ -9221,6 +9221,21 @@ static bool do_fp1_vector(DisasContext *s, arg_qrr_e *a,
TRANS(FSQRT_v, do_fp1_vector, a, &f_scalar_fsqrt, -1)
+TRANS(FRINTN_v, do_fp1_vector, a, &f_scalar_frint, FPROUNDING_TIEEVEN)
+TRANS(FRINTP_v, do_fp1_vector, a, &f_scalar_frint, FPROUNDING_POSINF)
+TRANS(FRINTM_v, do_fp1_vector, a, &f_scalar_frint, FPROUNDING_NEGINF)
+TRANS(FRINTZ_v, do_fp1_vector, a, &f_scalar_frint, FPROUNDING_ZERO)
+TRANS(FRINTA_v, do_fp1_vector, a, &f_scalar_frint, FPROUNDING_TIEAWAY)
+TRANS(FRINTI_v, do_fp1_vector, a, &f_scalar_frint, -1)
+TRANS(FRINTX_v, do_fp1_vector, a, &f_scalar_frintx, -1)
+
+TRANS_FEAT(FRINT32Z_v, aa64_frint, do_fp1_vector, a,
+ &f_scalar_frint32, FPROUNDING_ZERO)
+TRANS_FEAT(FRINT32X_v, aa64_frint, do_fp1_vector, a, &f_scalar_frint32, -1)
+TRANS_FEAT(FRINT64Z_v, aa64_frint, do_fp1_vector, a,
+ &f_scalar_frint64, FPROUNDING_ZERO)
+TRANS_FEAT(FRINT64X_v, aa64_frint, do_fp1_vector, a, &f_scalar_frint64, -1)
+
/* Common vector code for handling integer to FP conversion */
static void handle_simd_intfp_conv(DisasContext *s, int rd, int rn,
int elements, int is_signed,
@@ -9532,25 +9547,6 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
case 0x7b: /* FCVTZU */
gen_helper_vfp_touqd(tcg_rd, tcg_rn, tcg_constant_i32(0), tcg_fpstatus);
break;
- case 0x18: /* FRINTN */
- case 0x19: /* FRINTM */
- case 0x38: /* FRINTP */
- case 0x39: /* FRINTZ */
- case 0x58: /* FRINTA */
- case 0x79: /* FRINTI */
- gen_helper_rintd(tcg_rd, tcg_rn, tcg_fpstatus);
- break;
- case 0x59: /* FRINTX */
- gen_helper_rintd_exact(tcg_rd, tcg_rn, tcg_fpstatus);
- break;
- case 0x1e: /* FRINT32Z */
- case 0x5e: /* FRINT32X */
- gen_helper_frint32_d(tcg_rd, tcg_rn, tcg_fpstatus);
- break;
- case 0x1f: /* FRINT64Z */
- case 0x5f: /* FRINT64X */
- gen_helper_frint64_d(tcg_rd, tcg_rn, tcg_fpstatus);
- break;
default:
case 0x4: /* CLS, CLZ */
case 0x5: /* NOT */
@@ -9562,6 +9558,17 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
case 0x7f: /* FSQRT */
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x58: /* FRINTA */
+ case 0x79: /* FRINTI */
+ case 0x59: /* FRINTX */
+ case 0x1e: /* FRINT32Z */
+ case 0x5e: /* FRINT32X */
+ case 0x1f: /* FRINT64Z */
+ case 0x5f: /* FRINT64X */
g_assert_not_reached();
}
}
@@ -10106,46 +10113,12 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
}
handle_2misc_widening(s, opcode, is_q, size, rn, rd);
return;
- case 0x18: /* FRINTN */
- case 0x19: /* FRINTM */
- case 0x38: /* FRINTP */
- case 0x39: /* FRINTZ */
- rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1);
- /* fall through */
- case 0x59: /* FRINTX */
- case 0x79: /* FRINTI */
- need_fpstatus = true;
- if (size == 3 && !is_q) {
- unallocated_encoding(s);
- return;
- }
- break;
- case 0x58: /* FRINTA */
- rmode = FPROUNDING_TIEAWAY;
- need_fpstatus = true;
- if (size == 3 && !is_q) {
- unallocated_encoding(s);
- return;
- }
- break;
case 0x7c: /* URSQRTE */
if (size == 3) {
unallocated_encoding(s);
return;
}
break;
- case 0x1e: /* FRINT32Z */
- case 0x1f: /* FRINT64Z */
- rmode = FPROUNDING_ZERO;
- /* fall through */
- case 0x5e: /* FRINT32X */
- case 0x5f: /* FRINT64X */
- need_fpstatus = true;
- if ((size == 3 && !is_q) || !dc_isar_feature(aa64_frint, s)) {
- unallocated_encoding(s);
- return;
- }
- break;
default:
case 0x16: /* FCVTN, FCVTN2 */
case 0x36: /* BFCVTN, BFCVTN2 */
@@ -10153,6 +10126,17 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
case 0x7f: /* FSQRT */
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x59: /* FRINTX */
+ case 0x79: /* FRINTI */
+ case 0x58: /* FRINTA */
+ case 0x1e: /* FRINT32Z */
+ case 0x1f: /* FRINT64Z */
+ case 0x5e: /* FRINT32X */
+ case 0x5f: /* FRINT64X */
unallocated_encoding(s);
return;
}
@@ -10241,33 +10225,25 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
gen_helper_vfp_touls(tcg_res, tcg_op,
tcg_constant_i32(0), tcg_fpstatus);
break;
- case 0x18: /* FRINTN */
- case 0x19: /* FRINTM */
- case 0x38: /* FRINTP */
- case 0x39: /* FRINTZ */
- case 0x58: /* FRINTA */
- case 0x79: /* FRINTI */
- gen_helper_rints(tcg_res, tcg_op, tcg_fpstatus);
- break;
- case 0x59: /* FRINTX */
- gen_helper_rints_exact(tcg_res, tcg_op, tcg_fpstatus);
- break;
case 0x7c: /* URSQRTE */
gen_helper_rsqrte_u32(tcg_res, tcg_op);
break;
- case 0x1e: /* FRINT32Z */
- case 0x5e: /* FRINT32X */
- gen_helper_frint32_s(tcg_res, tcg_op, tcg_fpstatus);
- break;
- case 0x1f: /* FRINT64Z */
- case 0x5f: /* FRINT64X */
- gen_helper_frint64_s(tcg_res, tcg_op, tcg_fpstatus);
- break;
default:
case 0x7: /* SQABS, SQNEG */
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
case 0x7f: /* FSQRT */
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x58: /* FRINTA */
+ case 0x79: /* FRINTI */
+ case 0x59: /* FRINTX */
+ case 0x1e: /* FRINT32Z */
+ case 0x5e: /* FRINT32X */
+ case 0x1f: /* FRINT64Z */
+ case 0x5f: /* FRINT64X */
g_assert_not_reached();
}
}
@@ -10301,7 +10277,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
int rn, rd;
bool is_q;
bool is_scalar;
- bool only_in_vector = false;
int pass;
TCGv_i32 tcg_rmode = NULL;
@@ -10355,31 +10330,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x3d: /* FRECPE */
case 0x3f: /* FRECPX */
break;
- case 0x18: /* FRINTN */
- only_in_vector = true;
- rmode = FPROUNDING_TIEEVEN;
- break;
- case 0x19: /* FRINTM */
- only_in_vector = true;
- rmode = FPROUNDING_NEGINF;
- break;
- case 0x38: /* FRINTP */
- only_in_vector = true;
- rmode = FPROUNDING_POSINF;
- break;
- case 0x39: /* FRINTZ */
- only_in_vector = true;
- rmode = FPROUNDING_ZERO;
- break;
- case 0x58: /* FRINTA */
- only_in_vector = true;
- rmode = FPROUNDING_TIEAWAY;
- break;
- case 0x59: /* FRINTX */
- case 0x79: /* FRINTI */
- only_in_vector = true;
- /* current rounding mode */
- break;
case 0x1a: /* FCVTNS */
rmode = FPROUNDING_TIEEVEN;
break;
@@ -10416,6 +10366,13 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
case 0x7f: /* FSQRT (vector) */
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x58: /* FRINTA */
+ case 0x59: /* FRINTX */
+ case 0x79: /* FRINTI */
unallocated_encoding(s);
return;
}
@@ -10427,11 +10384,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
unallocated_encoding(s);
return;
}
- /* FRINTxx is only in the vector form */
- if (only_in_vector) {
- unallocated_encoding(s);
- return;
- }
}
if (!fp_access_check(s)) {
@@ -10507,17 +10459,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x7b: /* FCVTZU */
gen_helper_advsimd_f16touinth(tcg_res, tcg_op, tcg_fpstatus);
break;
- case 0x18: /* FRINTN */
- case 0x19: /* FRINTM */
- case 0x38: /* FRINTP */
- case 0x39: /* FRINTZ */
- case 0x58: /* FRINTA */
- case 0x79: /* FRINTI */
- gen_helper_advsimd_rinth(tcg_res, tcg_op, tcg_fpstatus);
- break;
- case 0x59: /* FRINTX */
- gen_helper_advsimd_rinth_exact(tcg_res, tcg_op, tcg_fpstatus);
- break;
case 0x7d: /* FRSQRTE */
gen_helper_rsqrte_f16(tcg_res, tcg_op, tcg_fpstatus);
break;
@@ -10525,6 +10466,13 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x2f: /* FABS */
case 0x6f: /* FNEG */
case 0x7f: /* FSQRT */
+ case 0x18: /* FRINTN */
+ case 0x19: /* FRINTM */
+ case 0x38: /* FRINTP */
+ case 0x39: /* FRINTZ */
+ case 0x58: /* FRINTA */
+ case 0x79: /* FRINTI */
+ case 0x59: /* FRINTX */
g_assert_not_reached();
}
@@ -1697,3 +1697,29 @@ FNEG_v 0.10 1110 1.1 00000 11111 0 ..... ..... @qrr_sd
FSQRT_v 0.10 1110 111 11001 11111 0 ..... ..... @qrr_h
FSQRT_v 0.10 1110 1.1 00001 11111 0 ..... ..... @qrr_sd
+
+FRINTN_v 0.00 1110 011 11001 10001 0 ..... ..... @qrr_h
+FRINTN_v 0.00 1110 0.1 00001 10001 0 ..... ..... @qrr_sd
+
+FRINTM_v 0.00 1110 011 11001 10011 0 ..... ..... @qrr_h
+FRINTM_v 0.00 1110 0.1 00001 10011 0 ..... ..... @qrr_sd
+
+FRINTP_v 0.00 1110 111 11001 10001 0 ..... ..... @qrr_h
+FRINTP_v 0.00 1110 1.1 00001 10001 0 ..... ..... @qrr_sd
+
+FRINTZ_v 0.00 1110 111 11001 10011 0 ..... ..... @qrr_h
+FRINTZ_v 0.00 1110 1.1 00001 10011 0 ..... ..... @qrr_sd
+
+FRINTA_v 0.10 1110 011 11001 10001 0 ..... ..... @qrr_h
+FRINTA_v 0.10 1110 0.1 00001 10001 0 ..... ..... @qrr_sd
+
+FRINTX_v 0.10 1110 011 11001 10011 0 ..... ..... @qrr_h
+FRINTX_v 0.10 1110 0.1 00001 10011 0 ..... ..... @qrr_sd
+
+FRINTI_v 0.10 1110 111 11001 10011 0 ..... ..... @qrr_h
+FRINTI_v 0.10 1110 1.1 00001 10011 0 ..... ..... @qrr_sd
+
+FRINT32Z_v 0.00 1110 0.1 00001 11101 0 ..... ..... @qrr_sd
+FRINT32X_v 0.10 1110 0.1 00001 11101 0 ..... ..... @qrr_sd
+FRINT64Z_v 0.00 1110 0.1 00001 11111 0 ..... ..... @qrr_sd
+FRINT64X_v 0.10 1110 0.1 00001 11111 0 ..... ..... @qrr_sd
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/tcg/translate-a64.c | 176 ++++++++++++--------------------- target/arm/tcg/a64.decode | 26 +++++ 2 files changed, 88 insertions(+), 114 deletions(-)