| Message ID | 20241201160938.44355-8-tomitamoeko@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | vfio/igd: Enable legacy mode on more devices | expand |
On Mon, 2024-12-02 at 00:09 +0800, Tomita Moeko wrote: > CAUTION: External Email!! > A recent commit in i915 driver [1] claims the BDSM register at 0x1080c0 > of mmio bar0 has been there since gen 6. Mirror this register to the 32 > bit BDSM register at 0x5c in pci config space for gen6-10 devices. > > [1] > https://nospamproxywebp.beckhoff.com/enQsig/link?id=BAgAAAAi96BdMcJV7rkAAABy4L3Y-n1H4M5Erk3toZdMOmhFmc4HUpjw_YG-G4-GcwmVdS8wC_pUyKH6p7x9_O-6Hprvyv9mbbWh_j2w5E6zLArS3crC1154aEYTRFcrIBLPMIoEAv9iTERXE2XB0E260O3pkmmo1UJOMUhb_fI5OUT3-68jnkq4QwTNgbnwmbVRnL2AyAM1pjuZqoqP6GP9y5e6OgocW-BJp0QtHO3eP9NbqTufifAAMfKlU7ekAZLWfPzejtqwaw2 > > > Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> > --- > hw/vfio/igd.c | 26 ++++++++++++++++++-------- > 1 file changed, 18 insertions(+), 8 deletions(-) > > diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c > index 07700dce30..3fd822241d 100644 > --- a/hw/vfio/igd.c > +++ b/hw/vfio/igd.c > @@ -482,7 +482,8 @@ static const MemoryRegionOps vfio_igd_quirk_mirror_##name = { \ > }; > > VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc) > -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm) > +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm) > +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64) > > void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) > { > @@ -506,7 +507,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) > * into MMIO space and read from MMIO space by the Windows driver. > */ > gen = igd_gen(vdev); > - if (gen < 11) { > + if (gen < 6) { This also causes the GGC register to be mirrored for gen 6 and later. Is this intended? If so, you should mention it in the commit message as well. > return; > } > > @@ -520,12 +521,21 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) > IGD_GGC_MMIO_OFFSET, &quirk->mem[0], > 1); > > - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), > - &vfio_igd_quirk_mirror_bdsm, vdev, > - "vfio-igd-bdsm-quirk", 8); > - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, > - IGD_BDSM_MMIO_OFFSET, &quirk->mem[1], > - 1); > + if (gen < 11) { > + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), > + &vfio_igd_quirk_mirror_bdsm, vdev, > + "vfio-igd-bdsm-quirk", 4); > + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, > + IGD_BDSM_MMIO_OFFSET, > + &quirk->mem[1], 1); > + } else { > + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), > + &vfio_igd_quirk_mirror_bdsm64, vdev, > + "vfio-igd-bdsm-quirk", 8); > + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, > + IGD_BDSM_MMIO_OFFSET, > + &quirk->mem[1], 1); > + } > > QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); > }
On 12/2/24 17:44, Corvin Köhne wrote: > On Mon, 2024-12-02 at 00:09 +0800, Tomita Moeko wrote: >> CAUTION: External Email!! >> A recent commit in i915 driver [1] claims the BDSM register at 0x1080c0 >> of mmio bar0 has been there since gen 6. Mirror this register to the 32 >> bit BDSM register at 0x5c in pci config space for gen6-10 devices. >> >> [1] >> https://nospamproxywebp.beckhoff.com/enQsig/link?id=BAgAAAAi96BdMcJV7rkAAABy4L3Y-n1H4M5Erk3toZdMOmhFmc4HUpjw_YG-G4-GcwmVdS8wC_pUyKH6p7x9_O-6Hprvyv9mbbWh_j2w5E6zLArS3crC1154aEYTRFcrIBLPMIoEAv9iTERXE2XB0E260O3pkmmo1UJOMUhb_fI5OUT3-68jnkq4QwTNgbnwmbVRnL2AyAM1pjuZqoqP6GP9y5e6OgocW-BJp0QtHO3eP9NbqTufifAAMfKlU7ekAZLWfPzejtqwaw2 >> >> >> Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> >> --- >> hw/vfio/igd.c | 26 ++++++++++++++++++-------- >> 1 file changed, 18 insertions(+), 8 deletions(-) >> >> diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c >> index 07700dce30..3fd822241d 100644 >> --- a/hw/vfio/igd.c >> +++ b/hw/vfio/igd.c >> @@ -482,7 +482,8 @@ static const MemoryRegionOps vfio_igd_quirk_mirror_##name = { \ >> }; >> >> VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc) >> -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm) >> +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm) >> +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64) >> >> void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) >> { >> @@ -506,7 +507,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) >> * into MMIO space and read from MMIO space by the Windows driver. >> */ >> gen = igd_gen(vdev); >> - if (gen < 11) { >> + if (gen < 6) { > > This also causes the GGC register to be mirrored for gen 6 and later. Is this intended? If so, you > should mention it in the commit message as well. Yes, I linked the i915 patch in commit message. >> return; >> } >> >> @@ -520,12 +521,21 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) >> IGD_GGC_MMIO_OFFSET, &quirk->mem[0], >> 1); >> >> - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), >> - &vfio_igd_quirk_mirror_bdsm, vdev, >> - "vfio-igd-bdsm-quirk", 8); >> - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, >> - IGD_BDSM_MMIO_OFFSET, &quirk->mem[1], >> - 1); >> + if (gen < 11) { >> + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), >> + &vfio_igd_quirk_mirror_bdsm, vdev, >> + "vfio-igd-bdsm-quirk", 4); >> + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, >> + IGD_BDSM_MMIO_OFFSET, >> + &quirk->mem[1], 1); >> + } else { >> + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), >> + &vfio_igd_quirk_mirror_bdsm64, vdev, >> + "vfio-igd-bdsm-quirk", 8); >> + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, >> + IGD_BDSM_MMIO_OFFSET, >> + &quirk->mem[1], 1); >> + } >> >> QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); >> } >
diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index 07700dce30..3fd822241d 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -482,7 +482,8 @@ static const MemoryRegionOps vfio_igd_quirk_mirror_##name = { \ }; VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc) -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm) +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm) +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64) void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) { @@ -506,7 +507,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) * into MMIO space and read from MMIO space by the Windows driver. */ gen = igd_gen(vdev); - if (gen < 11) { + if (gen < 6) { return; } @@ -520,12 +521,21 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) IGD_GGC_MMIO_OFFSET, &quirk->mem[0], 1); - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), - &vfio_igd_quirk_mirror_bdsm, vdev, - "vfio-igd-bdsm-quirk", 8); - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, - IGD_BDSM_MMIO_OFFSET, &quirk->mem[1], - 1); + if (gen < 11) { + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), + &vfio_igd_quirk_mirror_bdsm, vdev, + "vfio-igd-bdsm-quirk", 4); + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, + IGD_BDSM_MMIO_OFFSET, + &quirk->mem[1], 1); + } else { + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), + &vfio_igd_quirk_mirror_bdsm64, vdev, + "vfio-igd-bdsm-quirk", 8); + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, + IGD_BDSM_MMIO_OFFSET, + &quirk->mem[1], 1); + } QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); }
A recent commit in i915 driver [1] claims the BDSM register at 0x1080c0 of mmio bar0 has been there since gen 6. Mirror this register to the 32 bit BDSM register at 0x5c in pci config space for gen6-10 devices. [1] https://patchwork.freedesktop.org/patch/msgid/20240202224340.30647-7-ville.syrjala@linux.intel.com Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> --- hw/vfio/igd.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-)