diff mbox series

[v3,1/2] hw/nvme: Add properties for PCI vendor/device IDs

Message ID 20241202091049.2250-2-saif.abrar@linux.vnet.ibm.com (mailing list archive)
State New
Headers show
Series hw/nvme: Add properties for PCI vendor/device IDs and IEEE-OUI | expand

Commit Message

Saif Abrar Dec. 2, 2024, 9:10 a.m. UTC
Add properties for user specified PCI vendor,
device, subsystem vendor and subsystem IDs.

e.g. PCI IDs to be specified as follows:
-device nvme,id_vendor=0xABCD,id_device=0xA0B0,id_subsys_vendor=0xEF00,id_subsys=0xEF01

Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
---
v2 -> v3:
- User-specified PCI properties are used only when use_intel_id is not set.
- PCI properties can be set independently of each other.
- Setting IEEE-OUI moved to a different commit.

 hw/nvme/ctrl.c | 28 +++++++++++++++++++++++++---
 hw/nvme/nvme.h |  5 +++++
 2 files changed, 30 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 69bce20f66..e1aaab01bc 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -8477,7 +8477,10 @@  out:
 static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset)
 {
     uint16_t vf_dev_id = n->params.use_intel_id ?
-                         PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME;
+                         PCI_DEVICE_ID_INTEL_NVME :
+                         (n->params.id_device ?
+                          n->params.id_device : PCI_DEVICE_ID_REDHAT_NVME);
+
     NvmePriCtrlCap *cap = &n->pri_ctrl_cap;
     uint64_t bar_size = nvme_mbar_size(le16_to_cpu(cap->vqfrsm),
                                       le16_to_cpu(cap->vifrsm),
@@ -8550,8 +8553,22 @@  static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
         pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
         pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_NVME);
     } else {
-        pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT);
-        pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME);
+        uint16_t id_vendor = n->params.id_vendor ?
+                             n->params.id_vendor : PCI_VENDOR_ID_REDHAT;
+        pci_config_set_vendor_id(pci_conf, id_vendor);
+
+        uint16_t id_device = n->params.id_device ?
+                             n->params.id_device : PCI_DEVICE_ID_REDHAT_NVME;
+        pci_config_set_device_id(pci_conf, id_device);
+
+        if (n->params.id_subsys_vendor) {
+            pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID,
+                                                    n->params.id_subsys_vendor);
+        }
+
+        if (n->params.id_subsys) {
+            pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, n->params.id_subsys);
+        }
     }
 
     pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS);
@@ -8946,6 +8963,11 @@  static Property nvme_props[] = {
     DEFINE_PROP_BOOL("atomic.dn", NvmeCtrl, params.atomic_dn, 0),
     DEFINE_PROP_UINT16("atomic.awun", NvmeCtrl, params.atomic_awun, 0),
     DEFINE_PROP_UINT16("atomic.awupf", NvmeCtrl, params.atomic_awupf, 0),
+    DEFINE_PROP_UINT16("id_vendor", NvmeCtrl, params.id_vendor, 0),
+    DEFINE_PROP_UINT16("id_device", NvmeCtrl, params.id_device, 0),
+    DEFINE_PROP_UINT16("id_subsys_vendor", NvmeCtrl,
+                                                    params.id_subsys_vendor, 0),
+    DEFINE_PROP_UINT16("id_subsys", NvmeCtrl, params.id_subsys, 0),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h
index 7242206910..79404b3129 100644
--- a/hw/nvme/nvme.h
+++ b/hw/nvme/nvme.h
@@ -553,6 +553,11 @@  typedef struct NvmeParams {
     uint16_t atomic_awun;
     uint16_t atomic_awupf;
     bool     atomic_dn;
+
+    uint16_t id_vendor;
+    uint16_t id_device;
+    uint16_t id_subsys_vendor;
+    uint16_t id_subsys;
 } NvmeParams;
 
 typedef struct NvmeCtrl {