diff mbox series

[v2,for-10.0,36/54] target/microblaze: Set default NaN pattern explicitly

Message ID 20241202131347.498124-37-peter.maydell@linaro.org (mailing list archive)
State New
Headers show
Series fpu: Remove pickNaNMulAdd, default-NaN ifdefs | expand

Commit Message

Peter Maydell Dec. 2, 2024, 1:13 p.m. UTC
Set the default NaN pattern explicitly, and remove the ifdef from
parts64_default_nan().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/microblaze/cpu.c        | 2 ++
 fpu/softfloat-specialize.c.inc | 3 +--
 2 files changed, 3 insertions(+), 2 deletions(-)

Comments

Richard Henderson Dec. 2, 2024, 5:27 p.m. UTC | #1
On 12/2/24 07:13, Peter Maydell wrote:
> Set the default NaN pattern explicitly, and remove the ifdef from
> parts64_default_nan().
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/microblaze/cpu.c        | 2 ++
>   fpu/softfloat-specialize.c.inc | 3 +--
>   2 files changed, 3 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

> 
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index 710eb1146c1..0e1e22d1e8e 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -207,6 +207,8 @@ static void mb_cpu_reset_hold(Object *obj, ResetType type)
>        * this architecture.
>        */
>       set_float_2nan_prop_rule(float_2nan_prop_x87, &env->fp_status);
> +    /* Default NaN: sign bit set, most significant frac bit set */
> +    set_float_default_nan_pattern(0b11000000, &env->fp_status);
>   
>   #if defined(CONFIG_USER_ONLY)
>       /* start in user mode with interrupts enabled.  */
> diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
> index b1ec534983c..d77404f0c47 100644
> --- a/fpu/softfloat-specialize.c.inc
> +++ b/fpu/softfloat-specialize.c.inc
> @@ -139,8 +139,7 @@ static void parts64_default_nan(FloatParts64 *p, float_status *status)
>   #if defined(TARGET_SPARC) || defined(TARGET_M68K)
>           /* Sign bit clear, all frac bits set */
>           dnan_pattern = 0b01111111;
> -#elif defined(TARGET_I386) || defined(TARGET_X86_64)    \
> -    || defined(TARGET_MICROBLAZE)
> +#elif defined(TARGET_I386) || defined(TARGET_X86_64)
>           /* Sign bit set, most significant frac bit set */
>           dnan_pattern = 0b11000000;
>   #elif defined(TARGET_HPPA)
diff mbox series

Patch

diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 710eb1146c1..0e1e22d1e8e 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -207,6 +207,8 @@  static void mb_cpu_reset_hold(Object *obj, ResetType type)
      * this architecture.
      */
     set_float_2nan_prop_rule(float_2nan_prop_x87, &env->fp_status);
+    /* Default NaN: sign bit set, most significant frac bit set */
+    set_float_default_nan_pattern(0b11000000, &env->fp_status);
 
 #if defined(CONFIG_USER_ONLY)
     /* start in user mode with interrupts enabled.  */
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index b1ec534983c..d77404f0c47 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -139,8 +139,7 @@  static void parts64_default_nan(FloatParts64 *p, float_status *status)
 #if defined(TARGET_SPARC) || defined(TARGET_M68K)
         /* Sign bit clear, all frac bits set */
         dnan_pattern = 0b01111111;
-#elif defined(TARGET_I386) || defined(TARGET_X86_64)    \
-    || defined(TARGET_MICROBLAZE)
+#elif defined(TARGET_I386) || defined(TARGET_X86_64)
         /* Sign bit set, most significant frac bit set */
         dnan_pattern = 0b11000000;
 #elif defined(TARGET_HPPA)