[v2,for-10.0,52/54] target/riscv: Set default NaN pattern explicitly

Commit Message

Peter Maydell Dec. 2, 2024, 1:13 p.m. UTC

Set the default NaN pattern explicitly for riscv.

Signed-off-by: Peter Maydell <[e-mail]>
---
 target/riscv/cpu.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Richard Henderson Dec. 2, 2024, 5:38 p.m. UTC | #1

On 12/2/24 07:13, Peter Maydell wrote:
> Set the default NaN pattern explicitly for riscv.
> 
> Signed-off-by: Peter Maydell <[e-mail]>
> ---
>   target/riscv/cpu.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index f219f0c3b52..80b09952e78 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1022,6 +1022,8 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type)
>       cs->exception_index = RISCV_EXCP_NONE;
>       env->load_res = -1;
>       set_default_nan_mode(1, &env->fp_status);
> +    /* Default NaN value: sign bit clear, frac msb set */
> +    set_float_default_nan_pattern(0b01000000, &env->fp_status);
>       env->vill = true;
>   
>   #ifndef CONFIG_USER_ONLY

Reviewed-by: Richard Henderson <[e-mail]>

r~

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index f219f0c3b52..80b09952e78 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1022,6 +1022,8 @@  static void riscv_cpu_reset_hold(Object *obj, ResetType type)
     cs->exception_index = RISCV_EXCP_NONE;
     env->load_res = -1;
     set_default_nan_mode(1, &env->fp_status);
+    /* Default NaN value: sign bit clear, frac msb set */
+    set_float_default_nan_pattern(0b01000000, &env->fp_status);
     env->vill = true;
 
 #ifndef CONFIG_USER_ONLY