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Tue, 03 Dec 2024 05:36:25 -0800 (PST) Received: from kotori-desktop.lan ([116.231.112.6]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-215810cf18esm44183975ad.242.2024.12.03.05.36.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 05:36:24 -0800 (PST) From: Tomita Moeko To: qemu-devel@nongnu.org Cc: Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= , =?utf-8?q?Corvin_K=C3=B6hne?= , Tomita Moeko Subject: [PATCH v2 8/9] vfio/igd: emulate BDSM in mmio bar0 for gen 6-10 devices Date: Tue, 3 Dec 2024 21:35:47 +0800 Message-ID: <20241203133548.38252-9-tomitamoeko@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203133548.38252-1-tomitamoeko@gmail.com> References: <20241203133548.38252-1-tomitamoeko@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::642; envelope-from=tomitamoeko@gmail.com; helo=mail-pl1-x642.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A recent commit in i915 driver [1] claims the BDSM register at 0x1080c0 of mmio bar0 has been there since gen 6. Mirror this register to the 32 bit BDSM register at 0x5c in pci config space for gen6-10 devices. [1] https://patchwork.freedesktop.org/patch/msgid/20240202224340.30647-7-ville.syrjala@linux.intel.com Signed-off-by: Tomita Moeko Reviewed-by: Corvin Köhne --- hw/vfio/igd.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index bc18fc8cc0..e464cd6949 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -484,7 +484,8 @@ static const MemoryRegionOps vfio_igd_quirk_mirror_##name = { \ }; VFIO_IGD_QUIRK_MIRROR_REG(IGD_GMCH, ggc) -VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm) +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM, bdsm) +VFIO_IGD_QUIRK_MIRROR_REG(IGD_BDSM_GEN11, bdsm64) #define IGD_GGC_MMIO_OFFSET 0x108040 #define IGD_BDSM_MMIO_OFFSET 0x1080C0 @@ -511,7 +512,7 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) * into MMIO space and read from MMIO space by the Windows driver. */ gen = igd_gen(vdev); - if (gen < 11) { + if (gen < 6) { return; } @@ -525,12 +526,21 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr) IGD_GGC_MMIO_OFFSET, &quirk->mem[0], 1); - memory_region_init_io(&quirk->mem[1], OBJECT(vdev), - &vfio_igd_quirk_mirror_bdsm, vdev, - "vfio-igd-bdsm-quirk", 8); - memory_region_add_subregion_overlap(vdev->bars[0].region.mem, - IGD_BDSM_MMIO_OFFSET, &quirk->mem[1], - 1); + if (gen < 11) { + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), + &vfio_igd_quirk_mirror_bdsm, vdev, + "vfio-igd-bdsm-quirk", 4); + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, + IGD_BDSM_MMIO_OFFSET, + &quirk->mem[1], 1); + } else { + memory_region_init_io(&quirk->mem[1], OBJECT(vdev), + &vfio_igd_quirk_mirror_bdsm64, vdev, + "vfio-igd-bdsm-quirk", 8); + memory_region_add_subregion_overlap(vdev->bars[0].region.mem, + IGD_BDSM_MMIO_OFFSET, + &quirk->mem[1], 1); + } QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); }