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[78.54.30.63]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa625e92a58sm91959066b.48.2024.12.05.05.20.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Dec 2024 05:20:07 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Paolo Bonzini , qemu-arm@nongnu.org, qemu-block@nongnu.org, Peter Xu , John Snow , Bernhard Beschow Subject: [PATCH v3 1/2] hw/ide/ahci: Decouple from PCI Date: Thu, 5 Dec 2024 14:19:36 +0100 Message-ID: <20241205131937.32833-2-shentey@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241205131937.32833-1-shentey@gmail.com> References: <20241205131937.32833-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=shentey@gmail.com; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org In some adhoc profiling booting Linux VMs, it's observed that ahci_irq_lower() can be a hot path (10000+ triggers until login prompt appears). Even though the parent device never changes, this method re-determines whether the parent device is a PCI device or not using the rather expensive object_dynamic_cast() function. Avoid this overhead by pushing the interrupt handling to the parent device, essentially turning AHCIState into an "IP block". Note that this change also frees AHCIState from the PCI dependency which wasn't reflected in Kconfig. Reported-by: Peter Xu Inspired-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow --- Supersedes: 20241121100152.65476-1-philmd@linaro.org --- hw/ide/ahci-internal.h | 1 - include/hw/ide/ahci.h | 2 -- hw/ide/ahci.c | 39 ++++----------------------------------- hw/ide/ich.c | 17 ++++++++++++++++- 4 files changed, 20 insertions(+), 39 deletions(-) diff --git a/hw/ide/ahci-internal.h b/hw/ide/ahci-internal.h index 7e63ea2310..a318f36811 100644 --- a/hw/ide/ahci-internal.h +++ b/hw/ide/ahci-internal.h @@ -25,7 +25,6 @@ #define HW_IDE_AHCI_INTERNAL_H #include "hw/ide/ahci.h" -#include "hw/pci/pci_device.h" #include "ide-internal.h" #define AHCI_MEM_BAR_SIZE 0x1000 diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index ba31e75ff9..ac0292c634 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -37,8 +37,6 @@ typedef struct AHCIControlRegs { } AHCIControlRegs; typedef struct AHCIState { - DeviceState *container; - AHCIDevice *dev; AHCIControlRegs control_regs; MemoryRegion mem; diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 0eb24304ee..5836aa924b 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -23,8 +23,6 @@ #include "qemu/osdep.h" #include "hw/irq.h" -#include "hw/pci/msi.h" -#include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" @@ -34,8 +32,6 @@ #include "qemu/module.h" #include "sysemu/block-backend.h" #include "sysemu/dma.h" -#include "hw/ide/pci.h" -#include "hw/ide/ahci-pci.h" #include "hw/ide/ahci-sysbus.h" #include "ahci-internal.h" #include "ide-internal.h" @@ -179,34 +175,6 @@ static uint32_t ahci_port_read(AHCIState *s, int port, int offset) return val; } -static void ahci_irq_raise(AHCIState *s) -{ - DeviceState *dev_state = s->container; - PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state), - TYPE_PCI_DEVICE); - - trace_ahci_irq_raise(s); - - if (pci_dev && msi_enabled(pci_dev)) { - msi_notify(pci_dev, 0); - } else { - qemu_irq_raise(s->irq); - } -} - -static void ahci_irq_lower(AHCIState *s) -{ - DeviceState *dev_state = s->container; - PCIDevice *pci_dev = (PCIDevice *) object_dynamic_cast(OBJECT(dev_state), - TYPE_PCI_DEVICE); - - trace_ahci_irq_lower(s); - - if (!pci_dev || !msi_enabled(pci_dev)) { - qemu_irq_lower(s->irq); - } -} - static void ahci_check_irq(AHCIState *s) { int i; @@ -222,9 +190,11 @@ static void ahci_check_irq(AHCIState *s) trace_ahci_check_irq(s, old_irq, s->control_regs.irqstatus); if (s->control_regs.irqstatus && (s->control_regs.ghc & HOST_CTL_IRQ_EN)) { - ahci_irq_raise(s); + trace_ahci_irq_raise(s); + qemu_irq_raise(s->irq); } else { - ahci_irq_lower(s); + trace_ahci_irq_lower(s); + qemu_irq_lower(s->irq); } } @@ -1608,7 +1578,6 @@ static const IDEDMAOps ahci_dma_ops = { void ahci_init(AHCIState *s, DeviceState *qdev) { - s->container = qdev; /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */ memory_region_init_io(&s->mem, OBJECT(qdev), &ahci_mem_ops, s, "ahci", AHCI_MEM_BAR_SIZE); diff --git a/hw/ide/ich.c b/hw/ide/ich.c index b311450c12..066554f6cc 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -91,6 +91,21 @@ static const VMStateDescription vmstate_ich9_ahci = { }, }; +static void pci_ich9_ahci_update_irq(void *opaque, int irq_num, int level) +{ + PCIDevice *pci_dev = opaque; + + assert(irq_num == 0); + + if (msi_enabled(pci_dev)) { + if (level) { + msi_notify(pci_dev, 0); + } + } else { + pci_set_irq(pci_dev, level); + } +} + static void pci_ich9_reset(DeviceState *dev) { AHCIPCIState *d = ICH9_AHCI(dev); @@ -125,7 +140,7 @@ static void pci_ich9_ahci_realize(PCIDevice *dev, Error **errp) /* XXX Software should program this register */ dev->config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */ - d->ahci.irq = pci_allocate_irq(dev); + d->ahci.irq = qemu_allocate_irq(pci_ich9_ahci_update_irq, d, 0); pci_register_bar(dev, ICH9_IDP_BAR, PCI_BASE_ADDRESS_SPACE_IO, &d->ahci.idp);