Message ID | 20241205133003.184581-12-dbarboza@ventanamicro.com (mailing list archive) |
---|---|
State | New |
Headers | show
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Thu, 05 Dec 2024 05:30:43 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([187.101.65.72]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-725a2a8f512sm1250315b3a.126.2024.12.05.05.30.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Dec 2024 05:30:43 -0800 (PST) From: Daniel Henrique Barboza <dbarboza@ventanamicro.com> To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza <dbarboza@ventanamicro.com> Subject: [PATCH for-10.0 11/11] docs/specs/riscv-iommu.rst: add HPM support info Date: Thu, 5 Dec 2024 10:30:03 -0300 Message-ID: <20241205133003.184581-12-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241205133003.184581-1-dbarboza@ventanamicro.com> References: <20241205133003.184581-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::432; 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Series |
riscv: IOMMU HPM support
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expand
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diff --git a/docs/specs/riscv-iommu.rst b/docs/specs/riscv-iommu.rst index b1538c9ead..000c7e1f57 100644 --- a/docs/specs/riscv-iommu.rst +++ b/docs/specs/riscv-iommu.rst @@ -82,6 +82,8 @@ Several options are available to control the capabilities of the device, namely: - "off" (Out-of-reset translation mode: 'on' for DMA disabled, 'off' for 'BARE' (passthrough)) - "s-stage": enable s-stage support - "g-stage": enable g-stage support +- "hpm-counters": number of hardware performance counters available. Maximum value is 31. + Default value is 31. Use 0 (zero) to disable HPM support riscv-iommu-sys device ----------------------
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- docs/specs/riscv-iommu.rst | 2 ++ 1 file changed, 2 insertions(+)