| Message ID | 20241205145716.472456-2-xiaoyao.li@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | cpu: Drop CPUState::nr_cores | expand |
On Thu, Dec 05, 2024 at 09:57:13AM -0500, Xiaoyao Li wrote: > Date: Thu, 5 Dec 2024 09:57:13 -0500 > From: Xiaoyao Li <xiaoyao.li@intel.com> > Subject: [RFC PATCH 1/4] i386/topology: Update the comment of > x86_apicid_from_topo_ids() > X-Mailer: git-send-email 2.34.1 > > Update the comment of x86_apicid_from_topo_ids() to match the current > implementation, > > Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> > --- > include/hw/i386/topology.h | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h > index b2c8bf2de158..21b65219a5ca 100644 > --- a/include/hw/i386/topology.h > +++ b/include/hw/i386/topology.h > @@ -121,9 +121,10 @@ static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info) > } > > /* > - * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID > + * Make APIC ID for the CPU based on topology and IDs of each topology level. Maybe "based on sub-topology ID"? Otherwise, Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
On 12/11/2024 10:54 AM, Zhao Liu wrote: > On Thu, Dec 05, 2024 at 09:57:13AM -0500, Xiaoyao Li wrote: >> Date: Thu, 5 Dec 2024 09:57:13 -0500 >> From: Xiaoyao Li <xiaoyao.li@intel.com> >> Subject: [RFC PATCH 1/4] i386/topology: Update the comment of >> x86_apicid_from_topo_ids() >> X-Mailer: git-send-email 2.34.1 >> >> Update the comment of x86_apicid_from_topo_ids() to match the current >> implementation, >> >> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> >> --- >> include/hw/i386/topology.h | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h >> index b2c8bf2de158..21b65219a5ca 100644 >> --- a/include/hw/i386/topology.h >> +++ b/include/hw/i386/topology.h >> @@ -121,9 +121,10 @@ static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info) >> } >> >> /* >> - * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID >> + * Make APIC ID for the CPU based on topology and IDs of each topology level. > > Maybe "based on sub-topology ID"? I interpret "sub-topology ID" the same as "IDs of each topology level". But only with the information of IDs cannot produce a APIC ID, we need the width of each level as well. I think the "topology" expresses the width information, so I used the statement as "topology and IDs of each topology level" > Otherwise, > > Reviewed-by: Zhao Liu <zhao1.liu@intel.com> >
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index b2c8bf2de158..21b65219a5ca 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -121,9 +121,10 @@ static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info) } /* - * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID + * Make APIC ID for the CPU based on topology and IDs of each topology level. * - * The caller must make sure core_id < nr_cores and smt_id < nr_threads. + * The caller must make sure the ID of each level doesn't exceed the width of + * the level. */ static inline apic_id_t x86_apicid_from_topo_ids(X86CPUTopoInfo *topo_info, const X86CPUTopoIDs *topo_ids)
Update the comment of x86_apicid_from_topo_ids() to match the current implementation, Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> --- include/hw/i386/topology.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)